Loading arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts +2 −2 Original line number Diff line number Diff line Loading @@ -23,9 +23,9 @@ qcom,board-id = <1 0x0>, <1 0x100>, <1 0x2>, <1 0x102>; }; &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; pinctrl-0 = <&uart3_console_active>; status = "ok"; }; Loading arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts +2 −2 Original line number Diff line number Diff line Loading @@ -23,9 +23,9 @@ qcom,board-id = <8 0x0>, <8 0x100>, <8 0x2>, <8 0x102>; }; &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; pinctrl-0 = <&uart3_console_active>; status = "ok"; }; Loading arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,30 @@ }; }; uart3_console_active: uart3_console_active { mux { pins = "gpio8", "gpio9"; function = "blsp_uart3"; }; config { pins = "gpio8", "gpio9"; drive-strength = <2>; bias-disable; }; }; uart3_console_sleep: uart3_console_sleep { mux { pins = "gpio8", "gpio9"; function = "gpio"; }; config { pins = "gpio8", "gpio9"; drive-strength = <2>; bias-disable; }; }; /* I2C CONFIGURATION */ i2c_1 { i2c_1_active: i2c_1_active { Loading arch/arm/boot/dts/qcom/sdxpoorwills-rumi.dts +1 −1 Original line number Diff line number Diff line Loading @@ -47,7 +47,7 @@ #include "sdxpoorwills-stub-regulator.dtsi" &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; status = "ok"; Loading arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -216,7 +216,7 @@ < 1 >; }; blsp1_uart2: serial@831000 { serial_uart: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x831000 0x200>; interrupts = <0 26 0>; Loading Loading
arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts +2 −2 Original line number Diff line number Diff line Loading @@ -23,9 +23,9 @@ qcom,board-id = <1 0x0>, <1 0x100>, <1 0x2>, <1 0x102>; }; &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; pinctrl-0 = <&uart3_console_active>; status = "ok"; }; Loading
arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts +2 −2 Original line number Diff line number Diff line Loading @@ -23,9 +23,9 @@ qcom,board-id = <8 0x0>, <8 0x100>, <8 0x2>, <8 0x102>; }; &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; pinctrl-0 = <&uart3_console_active>; status = "ok"; }; Loading
arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,30 @@ }; }; uart3_console_active: uart3_console_active { mux { pins = "gpio8", "gpio9"; function = "blsp_uart3"; }; config { pins = "gpio8", "gpio9"; drive-strength = <2>; bias-disable; }; }; uart3_console_sleep: uart3_console_sleep { mux { pins = "gpio8", "gpio9"; function = "gpio"; }; config { pins = "gpio8", "gpio9"; drive-strength = <2>; bias-disable; }; }; /* I2C CONFIGURATION */ i2c_1 { i2c_1_active: i2c_1_active { Loading
arch/arm/boot/dts/qcom/sdxpoorwills-rumi.dts +1 −1 Original line number Diff line number Diff line Loading @@ -47,7 +47,7 @@ #include "sdxpoorwills-stub-regulator.dtsi" &blsp1_uart2 { &serial_uart { pinctrl-names = "default"; pinctrl-0 = <&uart2_console_active>; status = "ok"; Loading
arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -216,7 +216,7 @@ < 1 >; }; blsp1_uart2: serial@831000 { serial_uart: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x831000 0x200>; interrupts = <0 26 0>; Loading