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Commit 3b2cc8ab authored by Oscar Mateo's avatar Oscar Mateo Committed by Daniel Vetter
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drm/i915/bdw: Do not write the Semaphore Sync Registers in GEN8+ 



These do not exist anymore.

Spotted while reading through intel_ringbuffer.c

Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b90b91d8

drivers/gpu/drm/i915/intel_ringbuffer.c

+4 −3
Original line number Diff line number Diff line
@@ -1746,14 +1746,15 @@ int intel_ring_cacheline_align(struct intel_engine_cs *ring) 


void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)

{

	struct drm_i915_private *dev_priv = ring->dev->dev_private;

	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;



	BUG_ON(ring->outstanding_lazy_seqno);



	if (INTEL_INFO(ring->dev)->gen >= 6) {

	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {

		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);

		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);

		if (HAS_VEBOX(ring->dev))

		if (HAS_VEBOX(dev))

			I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);

	}