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Commit 39f76f2c authored by Trilok Soni's avatar Trilok Soni Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable PSCI for the CPUs 



Enable PSCI for the CPUs on msmskunk.

Change-Id: Iab04d5d3537448a10c57e44a7d55dd603b7875b1
Signed-off-by: default avatarTrilok Soni <tsoni@codeaurora.org>
Signed-off-by: default avatarChannagoud Kadabi <ckadabi@codeaurora.org>
parent 6a5bd8b1

arch/arm64/boot/dts/qcom/msmskunk.dtsi

+13 −8
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_0>;
@@ -70,7 +70,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_1>;
@@ -94,7 +94,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x200>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_2>;
@@ -118,7 +118,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x300>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_3>;
@@ -142,7 +142,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x400>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_4>;
@@ -166,7 +166,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x500>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_5>;
@@ -190,7 +190,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x600>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_6>;
@@ -214,7 +214,7 @@ 
			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x700>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			next-level-cache = <&L2_7>;
@@ -273,6 +273,11 @@ 
		};

	};



	psci {

		compatible = "arm,psci-1.0";

		method = "smc";

	};



	soc: soc { };



	reserved-memory {