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Commit 397e589e authored by Shrenuj Bansal's avatar Shrenuj Bansal
Browse files

msm: kgsl: Set global invalidate bit for A630v1 only 



The globalInvFlushFilterDis bit in the UCHE_MODE_CNTL register
should be set for A630v1 only. Add a function to recognize this
specific GPU and update the patchid in the gpulist.

Change-Id: Id4b72dc8e5e510c206fbdae7959c5c4ce567d7a3
Signed-off-by: default avatarShrenuj Bansal <shrenujb@codeaurora.org>
parent 4cc5e34d

drivers/gpu/msm/adreno.h

+6 −0
Original line number Diff line number Diff line
@@ -1073,6 +1073,12 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) 


ADRENO_TARGET(a630, ADRENO_REV_A630)



static inline int adreno_is_a630v1(struct adreno_device *adreno_dev)

{

	return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A630) &&

		(ADRENO_CHIPID_PATCH(adreno_dev->chipid) == 0);

}



/*

 * adreno_checkreg_off() - Checks the validity of a register enum

 * @adreno_dev:		Pointer to adreno device

drivers/gpu/msm/adreno_a6xx.c

+6 −4
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ static void a6xx_enable_64bit(struct adreno_device *adreno_dev) 
static void a6xx_start(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int bit, mal, mode;

	unsigned int bit, mal, mode, glbl_inv;

	unsigned int amsbc = 0;



	adreno_vbif_start(adreno_dev, a6xx_vbif_platforms,
@@ -241,6 +241,9 @@ static void a6xx_start(struct adreno_device *adreno_dev) 


	mal = (mal == 64) ? 1 : 0;



	/* (1 << 29)globalInvFlushFilterDis bit needs to be set for A630 V1 */

	glbl_inv = (adreno_is_a630v1(adreno_dev)) ? 1 : 0;



	kgsl_regwrite(device, A6XX_RB_NC_MODE_CNTL, (amsbc << 4) | (mal << 3) |

							(bit << 1) | mode);

	kgsl_regwrite(device, A6XX_TPL1_NC_MODE_CNTL, (mal << 3) |
@@ -248,9 +251,8 @@ static void a6xx_start(struct adreno_device *adreno_dev) 
	kgsl_regwrite(device, A6XX_SP_NC_MODE_CNTL, (mal << 3) | (bit << 1) |

								mode);



	/* (1 << 29)globalInvFlushFilterDis bit needs to be set for A630 V1 */

	kgsl_regwrite(device, A6XX_UCHE_MODE_CNTL, (1 << 29) | (mal << 23) |

								(bit << 21));

	kgsl_regwrite(device, A6XX_UCHE_MODE_CNTL, (glbl_inv << 29) |

						(mal << 23) | (bit << 21));



	kgsl_regwrite(device, A6XX_RBBM_INTERFACE_HANG_INT_CNTL,

					  (1 << 30) | 0x4000);