Merge "i2c-msm-v2: Add snapshot of I2C MSM V2 driver"

* Qualcomm technologies inc, DMA engine driver for BAM (Bus Access Manager).

Required properties:

- compatible: Should be "qcom,sps-dma".

- reg: Should contain DMA registers location and length. This should include

  all of the per-channel registers.

- interrupts: Should contain the BAM interrupt number.

- qcom,summing-threshold:  Should contain the BAM event threshold of

  the sum of descriptors' sizes in bytes.

Optional properties:

- qcom,managed-locally : Use when BAM global device control is managed locally

  by the application processor.

Example:

	dma_blsp1: qcom,sps-dma@f9904000 { /* BLSP1 */

		#dma-cells = <4>;

		compatible = "qcom,sps-dma";

		reg = <0xf9904000 0x19000>;

		interrupts = <0 238 0>;

		qcom,summing-threshold = <10>;

	};

DMA clients connected to the qcom-sps-dma DMA controller must use the format

described in the dma.txt file, using a five-cell specifier for each channel,

a phandle plus four integer cells, as shown below:

dmas = <[phandle of the dma controller] [pipe index] [number of descriptors]

				[sps_connect flags] [sps_register_event flags]>;

Example:

i2c_2: i2c@f9924000 { /* BLSP1 QUP2 */

	.

	.

	.

	/*     <&phandle pipe-idx n-descs connect-flags event-flags> */

	dmas = <&dma_blsp1 14 32 0x20000020 0x20>,

	       <&dma_blsp1 15 64 0x20000020 0x20>;

	dma-names = "tx", "rx";

};

Qualcomm I2C controller

Required properties:

 - reg : Offset and length of the register region for the device named in

	reg-names and has the same index.

 - reg-names : Register region name(s) referenced in reg above

	"qup_phys_addr" : Physical address of QUP register space.

 - compatible : should be "qcom,i2c-msm-v2"

 - interrupts : Interrupt number which correspond to the entry with the same

	index in interrupt-names.

 - interrupt-names: QUP core interrupt name(s) referenced in interrupts above

	"qup_irq" : QUP interrupt used by the controller.

 - dmas : DMA engine API's parameters for blsp.

	<[phandle of the dma controller] [pipe index] [number of descriptors]

				[sps_connect flags] [sps_register_event flags]>;

 - dma-names :  dma channel names.

 - qcom,clk-freq-out : Desired I2C bus clock frequency in Hz

 - qcom,clk-freq-in  : Supplied core clock frequency in Hz.

Required alias:

 - The desired bus-number is specified by an alias with the following format:

	'i2c{n}' where n is the bus number.

Optional property:

 - qcom,noise-rjct-scl : number of low samples on clock line to consider it low.

	When missing default to 0.

 - qcom,noise-rjct-sda : number of low samples on data  line to consider it low.

	When missing default to 0.

 - qcom,disable-dma : disables DMA transfer mode.

 - qcom,master-id : Master-port value used on voting for the clock path.

 - qcom,high-time-clk-div : high time divider value to configure clk-ctl

	register. When missing, default to the value given in driver.

 - qcom,fs-clk-div: fs divider value to configure clk-ctl register. When

	missing, default to the value given in driver.

Example:

	aliases {

		i2c10 = &i2c_10;

	};

	i2c_10: i2c@f9966000 {

		compatible = "qcom,i2c-msm-v2";

		reg-names = "qup_phys_addr", "dma_phys_addr";

		reg = <0xf9966000 0x1000>;

		interrupt-names = "qup_irq";

		interrupts = <0 104 0>;

		dmas = <&dma_blsp1 14 32 0x20000020 0x20>,

			<&dma_blsp1 15 64 0x20000020 0x20>;

		dma-names = "tx", "rx";

		qcom,clk-freq-out = <100000>;

		qcom,clk-freq-in  = <24000000>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

	};

	  16 to 32 channels for peripheral to memory or memory to memory

	  transfers.

config QCOM_SPS_DMA

	tristate "Qualcomm technologies inc DMA driver for sps-BAM"

	depends on ARCH_QCOM

	select DMA_ENGINE

	help

	  Enable support for Qualcomm technologies inc, BAM DMA engine.

	  This DMA-engine-driver is a wrapper of the sps-BAM library. DMA

	  engine callbacks are implemented using the sps-BAM functionality

	  to access HW.

config SIRF_DMA

	tristate "CSR SiRFprimaII/SiRFmarco DMA support"

	depends on ARCH_SIRF

obj-$(CONFIG_TI_EDMA) += edma.o

obj-$(CONFIG_XGENE_DMA) += xgene-dma.o

obj-$(CONFIG_ZX_DMA) += zx296702_dma.o

obj-$(CONFIG_QCOM_SPS_DMA) += qcom-sps-dma.o

obj-y += qcom/

obj-y += xilinx/