Loading arch/arm64/boot/dts/qcom/msm8953.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -675,6 +675,8 @@ reg = <0x1800000 0x80000>; reg-names = "cc_base"; vdd_gfx-supply = <&gfx_vreg_corner>; clocks = <&clock_gcc clk_xo_clk_src>; clock-names = "xo"; qcom,gfxfreq-corner = < 0 0 >, < 133330000 1 >, /* Min SVS */ Loading drivers/clk/msm/clock-gcc-8953.c +10 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -4072,8 +4072,17 @@ static int msm_gcc_gfx_probe(struct platform_device *pdev) struct resource *res; int ret; u32 regval; struct clk *xo_clk; bool compat_bin = false; /* Require the GCC-RPM-XO clock to be registered first */ xo_clk = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(xo_clk)) { if (PTR_ERR(xo_clk) != -EPROBE_DEFER) dev_err(&pdev->dev, "Unable to get xo clock\n"); return PTR_ERR(xo_clk); } res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cc_base"); if (!res) { dev_err(&pdev->dev, "Register base not defined\n"); Loading Loading
arch/arm64/boot/dts/qcom/msm8953.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -675,6 +675,8 @@ reg = <0x1800000 0x80000>; reg-names = "cc_base"; vdd_gfx-supply = <&gfx_vreg_corner>; clocks = <&clock_gcc clk_xo_clk_src>; clock-names = "xo"; qcom,gfxfreq-corner = < 0 0 >, < 133330000 1 >, /* Min SVS */ Loading
drivers/clk/msm/clock-gcc-8953.c +10 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -4072,8 +4072,17 @@ static int msm_gcc_gfx_probe(struct platform_device *pdev) struct resource *res; int ret; u32 regval; struct clk *xo_clk; bool compat_bin = false; /* Require the GCC-RPM-XO clock to be registered first */ xo_clk = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(xo_clk)) { if (PTR_ERR(xo_clk) != -EPROBE_DEFER) dev_err(&pdev->dev, "Unable to get xo clock\n"); return PTR_ERR(xo_clk); } res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cc_base"); if (!res) { dev_err(&pdev->dev, "Register base not defined\n"); Loading