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Commit 38c07b43 authored by Pavel Roskin's avatar Pavel Roskin Committed by John W. Linville
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ath5k: fix all endian issues reported by sparse



Changes-licensed-under: ISC
Signed-off-by: default avatarPavel Roskin <proski@gnu.org>
Acked-by: default avatarLuis R. Rodriguez <mcgrof@winlab.rutgers.edu>
Acked-by: default avatarNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent e6084239
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+4 −4
Original line number Diff line number Diff line
@@ -1717,11 +1717,11 @@ ath5k_check_ibss_hw_merge(struct ath5k_softc *sc, struct sk_buff *skb)
	u32 hw_tu;
	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;

	if ((mgmt->frame_control & IEEE80211_FCTL_FTYPE) ==
	if ((le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_FTYPE) ==
		IEEE80211_FTYPE_MGMT &&
	    (mgmt->frame_control & IEEE80211_FCTL_STYPE) ==
	    (le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE) ==
		IEEE80211_STYPE_BEACON &&
	    mgmt->u.beacon.capab_info & WLAN_CAPABILITY_IBSS &&
	    le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS &&
	    memcmp(mgmt->bssid, sc->ah->ah_bssid, ETH_ALEN) == 0) {
		/*
		 * Received an IBSS beacon with the same BSSID. Hardware might
@@ -1730,7 +1730,7 @@ ath5k_check_ibss_hw_merge(struct ath5k_softc *sc, struct sk_buff *skb)
		hw_tu = TSF_TO_TU(ath5k_hw_get_tsf64(sc->ah));
		if (hw_tu >= sc->nexttbtt) {
			ath5k_beacon_update_timers(sc,
				mgmt->u.beacon.timestamp);
				le64_to_cpu(mgmt->u.beacon.timestamp));
			ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON,
				"detected HW merge from received beacon\n");
		}
+2 −2
Original line number Diff line number Diff line
@@ -531,8 +531,8 @@ static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah,
		 * actual rate for this rate. See mac80211 tx.c
		 * ieee80211_duration() for a brief description of
		 * what rate we should choose to TX ACKs. */
		tx_time = ieee80211_generic_frame_duration(sc->hw,
			sc->vif, 10, &srate);
		tx_time = le16_to_cpu(ieee80211_generic_frame_duration(sc->hw,
							sc->vif, 10, &srate));

		ath5k_hw_reg_write(ah, tx_time, reg);