ARM: dts: msm: update sdm670 devfreq node with proper cpu number

In sdm670 we have 6 silver and 2 gold cores. Update the
devfreq node with proper cpu number and proper PMU event
for L3 cache miss event.

Change-Id: I56d9217649ef51a0326401f7fe4c9ae8239bcea1
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>