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Commit 378a9b44 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm/sde: update bandwidth with display rsc solver mode 



The display rsc solver mode takes care of WAKE TCS and
SLEEP TCS transfer aligned with different modes entry/exit.
This allows to reduce the complexity in software and allows
to increase/decrease the vote before frame transfer start or
finish. This change adds the dynamic support in core perf driver
to update WAKE TCS without waiting for frame transfer complete.

Change-Id: Idc11aa5d24b9492f546f7fddbc0c6247e711ab9a
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent dd2032ab

drivers/gpu/drm/msm/sde/sde_core_perf.c

+19 −0
Original line number Diff line number Diff line
@@ -420,6 +420,10 @@ void sde_core_perf_crtc_update(struct drm_crtc *crtc, 
	}

	priv = kms->dev->dev_private;



	/* wake vote update is not required with display rsc */

	if (kms->perf.bw_vote_mode == DISP_RSC_MODE && stop_req)

		return;



	sde_crtc = to_sde_crtc(crtc);

	sde_cstate = to_sde_crtc_state(crtc->state);
@@ -447,6 +451,21 @@ void sde_core_perf_crtc_update(struct drm_crtc *crtc, 
			update_bus = 1;

		}



		/* display rsc override during solver mode */

		if (kms->perf.bw_vote_mode == DISP_RSC_MODE &&

				get_sde_rsc_current_state(SDE_RSC_INDEX) ==

							    SDE_RSC_CMD_STATE) {

			/* update new bandwdith in all cases */

			if (params_changed && new->bw_ctl != old->bw_ctl) {

				old->bw_ctl = new->bw_ctl;

				old->max_per_pipe_ib = new->max_per_pipe_ib;

				update_bus = 1;

			/* reduce bw vote is not required in solver mode */

			} else if (!params_changed) {

				update_bus = 0;

			}

		}



		if ((params_changed &&

				(new->core_clk_rate > old->core_clk_rate)) ||

				(!params_changed &&