Commit 374bc13e authored Dec 06, 2019 by jianzhou

Merge android-4.9.196(cd0d461b) into msm-4.9



* refs/heads/tmp-cd0d461b:
  Linux 4.9.196
  NFC: fix attrs checks in netlink interface
  smack: use GFP_NOFS while holding inode_smack::smk_lock
  Smack: Don't ignore other bprm->unsafe flags if LSM_UNSAFE_PTRACE is set
  ipv6: Handle missing host route in __ipv6_ifa_notify
  sch_cbq: validate TCA_CBQ_WRROPT to avoid crash
  xen-netfront: do not use ~0U as error return value for xennet_fill_frags()
  net/rds: Fix error handling in rds_ib_add_one()
  sch_dsmark: fix potential NULL deref in dsmark_init()
  qmi_wwan: add support for Cinterion CLS8 devices
  nfc: fix memory leak in llcp_sock_bind()
  net: Unpublish sk from sk_reuseport_cb before call_rcu
  net: qlogic: Fix memory leak in ql_alloc_large_buffers
  net: ipv4: avoid mixed n_redirects and rate_tokens usage
  ipv6: drop incoming packets having a v4mapped source address
  hso: fix NULL-deref on tty open
  cxgb4:Fix out-of-bounds MSI-X info array access
  ANDROID: binder: synchronize_rcu() when using POLLFREE.
  ANDROID: binder: remove waitqueue when thread exits.
  kmemleak: increase DEBUG_KMEMLEAK_EARLY_LOG_SIZE default to 16K
  ocfs2: wait for recovering done after direct unlock request
  hypfs: Fix error number left in struct pointer member
  fat: work around race with userspace's read via blockdev while mounting
  ARM: 8903/1: ensure that usable memory in bank 0 starts from a PMD-aligned address
  security: smack: Fix possible null-pointer dereferences in smack_socket_sock_rcv_skb()
  HID: apple: Fix stuck function keys when using FN
  ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes
  PCI: tegra: Fix OF node reference leak
  mfd: intel-lpss: Remove D3cold delay
  MIPS: tlbex: Explicitly cast _PAGE_NO_EXEC to a boolean
  scsi: core: Reduce memory required for SCSI logging
  clk: at91: select parent if main oscillator or bypass is enabled
  arm64: fix unreachable code issue with cmpxchg
  powerpc/pseries: correctly track irq state in default idle
  powerpc/64s/exception: machine check use correct cfar for late handler
  drm/amdgpu/si: fix ASIC tests
  vfio_pci: Restore original state on release
  pinctrl: tegra: Fix write barrier placement in pmx_writel
  powerpc/pseries/mobility: use cond_resched when updating device tree
  powerpc/futex: Fix warning: 'oldval' may be used uninitialized in this function
  powerpc/rtas: use device model APIs and serialization during LPM
  clk: sirf: Don't reference clk_init_data after registration
  clk: qoriq: Fix -Wunused-const-variable
  ipmi_si: Only schedule continuously in the thread in maintenance mode
  gpu: drm: radeon: Fix a possible null-pointer dereference in radeon_connector_set_property()
  drm/radeon: Fix EEH during kexec
  video: ssd1307fb: Start page range at page_offset
  drm/bridge: tc358767: Increase AUX transfer length limit

Change-Id: Ifcf3e17477d4379fbc67a8d343cfcf7dfda0e96a
Signed-off-by: jianzhou <jianzhou@codeaurora.org>

parents f661fcec cd0d461b

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 9
		SUBLEVEL = 195
		SUBLEVEL = 196
		EXTRAVERSION =
		NAME = Roaring Lionus

arch/arm/mm/fault.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -214,7 +214,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
		{
		unsigned int mask = VM_READ \| VM_WRITE \| VM_EXEC;

		if (fsr & FSR_WRITE)
		if ((fsr & FSR_WRITE) && !(fsr & FSR_CM))
		mask = VM_WRITE;
		if (fsr & FSR_LNX_PF)
		mask = VM_EXEC;
		@@ -284,7 +284,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)

		if (user_mode(regs))
		flags \|= FAULT_FLAG_USER;
		if (fsr & FSR_WRITE)
		if ((fsr & FSR_WRITE) && !(fsr & FSR_CM))
		flags \|= FAULT_FLAG_WRITE;

		/*

arch/arm/mm/fault.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@
		* Fault status register encodings. We steal bit 31 for our own purposes.
		*/
		#define FSR_LNX_PF (1 << 31)
		#define FSR_CM (1 << 13)
		#define FSR_WRITE (1 << 11)
		#define FSR_FS4 (1 << 10)
		#define FSR_FS3_0 (15)

arch/arm/mm/mmu.c

+16 −0

Original line number	Diff line number	Diff line
		@@ -1168,6 +1168,22 @@ void __init adjust_lowmem_bounds(void)
		*/
		vmalloc_limit = (u64)(uintptr_t)vmalloc_min - PAGE_OFFSET + PHYS_OFFSET;

		/*
		* The first usable region must be PMD aligned. Mark its start
		* as MEMBLOCK_NOMAP if it isn't
		*/
		for_each_memblock(memory, reg) {
		if (!memblock_is_nomap(reg)) {
		if (!IS_ALIGNED(reg->base, PMD_SIZE)) {
		phys_addr_t len;

		len = round_up(reg->base, PMD_SIZE) - reg->base;
		memblock_mark_nomap(reg->base, len);
		}
		break;
		}
		}

		for_each_memblock(memory, reg) {
		phys_addr_t block_start = reg->base;
		phys_addr_t block_end = reg->base + reg->size;

arch/arm64/include/asm/cmpxchg.h

+3 −3

Original line number	Diff line number	Diff line
		@@ -73,7 +73,7 @@ __XCHG_CASE( , , mb_8, dmb ish, nop, , a, l, "memory")
		#undef __XCHG_CASE

		#define __XCHG_GEN(sfx) \
		static inline unsigned long __xchg##sfx(unsigned long x, \
		static __always_inline unsigned long __xchg##sfx(unsigned long x, \
		volatile void *ptr, \
		int size) \
		{ \
		@@ -115,7 +115,7 @@ __XCHG_GEN(_mb)
		#define xchg(...) __xchg_wrapper( _mb, __VA_ARGS__)

		#define __CMPXCHG_GEN(sfx) \
		static inline unsigned long __cmpxchg##sfx(volatile void *ptr, \
		static __always_inline unsigned long __cmpxchg##sfx(volatile void *ptr, \
		unsigned long old, \
		unsigned long new, \
		int size) \
		@@ -248,7 +248,7 @@ __CMPWAIT_CASE( , , 8);
		#undef __CMPWAIT_CASE

		#define __CMPWAIT_GEN(sfx) \
		static inline void __cmpwait##sfx(volatile void *ptr, \
		static __always_inline void __cmpwait##sfx(volatile void *ptr, \
		unsigned long val, \
		int size) \
		{ \