Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 36b7be6d authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Thierry Reding
Browse files

clk: tegra: Fix hda2codec_2x clock name for Tegra30 



The HDA to codec clock is named hda2codec_2x, so use the proper name in
the clock table.

Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 31b52ba4

drivers/clk/tegra/clk-tegra30.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -679,7 +679,7 @@ static struct tegra_devclk devclks[] __initdata = { 
	{ .dev_id = "tegra30-dam.1", .dt_id = TEGRA30_CLK_DAM1 },

	{ .dev_id = "tegra30-dam.1", .dt_id = TEGRA30_CLK_DAM1 },

	{ .dev_id = "tegra30-dam.2", .dt_id = TEGRA30_CLK_DAM2 },

	{ .dev_id = "tegra30-dam.2", .dt_id = TEGRA30_CLK_DAM2 },

	{ .con_id = "hda", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA },

	{ .con_id = "hda", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA },

	{ .con_id = "hda2codec", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2CODEC_2X },

	{ .con_id = "hda2codec_2x", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2CODEC_2X },

	{ .dev_id = "spi_tegra.0", .dt_id = TEGRA30_CLK_SBC1 },

	{ .dev_id = "spi_tegra.0", .dt_id = TEGRA30_CLK_SBC1 },

	{ .dev_id = "spi_tegra.1", .dt_id = TEGRA30_CLK_SBC2 },

	{ .dev_id = "spi_tegra.1", .dt_id = TEGRA30_CLK_SBC2 },

	{ .dev_id = "spi_tegra.2", .dt_id = TEGRA30_CLK_SBC3 },

	{ .dev_id = "spi_tegra.2", .dt_id = TEGRA30_CLK_SBC3 },