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Commit 366c595f authored by Peter Seiderer's avatar Peter Seiderer Committed by Shawn Guo
Browse files

ARM: dts: sabrelite: add CAN support 



Signed-off-by: default avatarPeter Seiderer <ps.report@gmx.net>
Tested-by: default avatarEric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 3e223394

arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

+32 −0
Original line number Diff line number Diff line
@@ -53,6 +53,17 @@ 
			gpio = <&gpio3 22 0>;

			enable-active-high;

		};



		reg_can_xcvr: regulator@3 {

			compatible = "regulator-fixed";

			reg = <3>;

			regulator-name = "CAN XCVR";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_can_xcvr>;

			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

		};

	};



	gpio-keys {
@@ -148,6 +159,13 @@ 
	status = "okay";

};



&can1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_can1>;

	xceiver-supply = <&reg_can_xcvr>;

	status = "okay";

};



&ecspi1 {

	fsl,spi-num-chipselects = <1>;

	cs-gpios = <&gpio3 19 0>;
@@ -239,6 +257,20 @@ 
			>;

		};



		pinctrl_can1: can1grp {

			fsl,pins = <

				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0

				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0

			>;

		};



		pinctrl_can_xcvr: can-xcvrgrp {

			fsl,pins = <

				/* Flexcan XCVR enable */

				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0

			>;

		};



		pinctrl_ecspi1: ecspi1grp {

			fsl,pins = <

				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1