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Commit 362f924b authored by Borislav Petkov's avatar Borislav Petkov Committed by Thomas Gleixner
Browse files

x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros 



Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.

The remaining ones need more careful inspection before a conversion can
happen. On the TODO.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email-bp@alien8.de


Cc: David Sterba <dsterba@suse.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Chris Mason <clm@fb.com>
Cc: Josef Bacik <jbacik@fb.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 39c06df4

arch/x86/crypto/chacha20_glue.c

+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static struct crypto_alg alg = { 


static int __init chacha20_simd_mod_init(void)

{

	if (!cpu_has_ssse3)

	if (!boot_cpu_has(X86_FEATURE_SSSE3))

		return -ENODEV;



#ifdef CONFIG_AS_AVX2

arch/x86/crypto/crc32c-intel_glue.c

+1 −1
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void) 
	if (!x86_match_cpu(crc32c_cpu_id))

		return -ENODEV;

#ifdef CONFIG_X86_64

	if (cpu_has_pclmulqdq) {

	if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {

		alg.update = crc32c_pcl_intel_update;

		alg.finup = crc32c_pcl_intel_finup;

		alg.digest = crc32c_pcl_intel_digest;

arch/x86/include/asm/cmpxchg_32.h

+1 −1
Original line number Diff line number Diff line
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new) 


#endif



#define system_has_cmpxchg_double() cpu_has_cx8

#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)



#endif /* _ASM_X86_CMPXCHG_32_H */

arch/x86/include/asm/cmpxchg_64.h

+1 −1
Original line number Diff line number Diff line
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val) 
	cmpxchg_local((ptr), (o), (n));					\

})



#define system_has_cmpxchg_double() cpu_has_cx16

#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)



#endif /* _ASM_X86_CMPXCHG_64_H */

arch/x86/include/asm/cpufeature.h

+4 −33
Original line number Diff line number Diff line
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; 
} while (0)



#define cpu_has_fpu		boot_cpu_has(X86_FEATURE_FPU)

#define cpu_has_de		boot_cpu_has(X86_FEATURE_DE)

#define cpu_has_pse		boot_cpu_has(X86_FEATURE_PSE)

#define cpu_has_tsc		boot_cpu_has(X86_FEATURE_TSC)

#define cpu_has_pge		boot_cpu_has(X86_FEATURE_PGE)

#define cpu_has_apic		boot_cpu_has(X86_FEATURE_APIC)

#define cpu_has_sep		boot_cpu_has(X86_FEATURE_SEP)

#define cpu_has_mtrr		boot_cpu_has(X86_FEATURE_MTRR)

#define cpu_has_mmx		boot_cpu_has(X86_FEATURE_MMX)

#define cpu_has_fxsr		boot_cpu_has(X86_FEATURE_FXSR)

#define cpu_has_xmm		boot_cpu_has(X86_FEATURE_XMM)

#define cpu_has_xmm2		boot_cpu_has(X86_FEATURE_XMM2)

#define cpu_has_xmm3		boot_cpu_has(X86_FEATURE_XMM3)

#define cpu_has_ssse3		boot_cpu_has(X86_FEATURE_SSSE3)

#define cpu_has_aes		boot_cpu_has(X86_FEATURE_AES)

#define cpu_has_avx		boot_cpu_has(X86_FEATURE_AVX)

#define cpu_has_avx2		boot_cpu_has(X86_FEATURE_AVX2)

#define cpu_has_ht		boot_cpu_has(X86_FEATURE_HT)

#define cpu_has_nx		boot_cpu_has(X86_FEATURE_NX)

#define cpu_has_xstore		boot_cpu_has(X86_FEATURE_XSTORE)

#define cpu_has_xstore_enabled	boot_cpu_has(X86_FEATURE_XSTORE_EN)

#define cpu_has_xcrypt		boot_cpu_has(X86_FEATURE_XCRYPT)

#define cpu_has_xcrypt_enabled	boot_cpu_has(X86_FEATURE_XCRYPT_EN)

#define cpu_has_ace2		boot_cpu_has(X86_FEATURE_ACE2)

#define cpu_has_ace2_enabled	boot_cpu_has(X86_FEATURE_ACE2_EN)

#define cpu_has_phe		boot_cpu_has(X86_FEATURE_PHE)

#define cpu_has_phe_enabled	boot_cpu_has(X86_FEATURE_PHE_EN)

#define cpu_has_pmm		boot_cpu_has(X86_FEATURE_PMM)

#define cpu_has_pmm_enabled	boot_cpu_has(X86_FEATURE_PMM_EN)

#define cpu_has_ds		boot_cpu_has(X86_FEATURE_DS)

#define cpu_has_pebs		boot_cpu_has(X86_FEATURE_PEBS)

#define cpu_has_clflush		boot_cpu_has(X86_FEATURE_CLFLUSH)

#define cpu_has_bts		boot_cpu_has(X86_FEATURE_BTS)

#define cpu_has_gbpages		boot_cpu_has(X86_FEATURE_GBPAGES)

#define cpu_has_arch_perfmon	boot_cpu_has(X86_FEATURE_ARCH_PERFMON)

#define cpu_has_pat		boot_cpu_has(X86_FEATURE_PAT)

#define cpu_has_xmm4_1		boot_cpu_has(X86_FEATURE_XMM4_1)

#define cpu_has_xmm4_2		boot_cpu_has(X86_FEATURE_XMM4_2)

#define cpu_has_x2apic		boot_cpu_has(X86_FEATURE_X2APIC)

#define cpu_has_xsave		boot_cpu_has(X86_FEATURE_XSAVE)

#define cpu_has_xsaveopt	boot_cpu_has(X86_FEATURE_XSAVEOPT)

#define cpu_has_xsaves		boot_cpu_has(X86_FEATURE_XSAVES)

#define cpu_has_osxsave		boot_cpu_has(X86_FEATURE_OSXSAVE)

#define cpu_has_hypervisor	boot_cpu_has(X86_FEATURE_HYPERVISOR)

#define cpu_has_pclmulqdq	boot_cpu_has(X86_FEATURE_PCLMULQDQ)

#define cpu_has_perfctr_core	boot_cpu_has(X86_FEATURE_PERFCTR_CORE)

#define cpu_has_perfctr_nb	boot_cpu_has(X86_FEATURE_PERFCTR_NB)

#define cpu_has_perfctr_l2	boot_cpu_has(X86_FEATURE_PERFCTR_L2)

#define cpu_has_cx8		boot_cpu_has(X86_FEATURE_CX8)

#define cpu_has_cx16		boot_cpu_has(X86_FEATURE_CX16)

#define cpu_has_eager_fpu	boot_cpu_has(X86_FEATURE_EAGER_FPU)

#define cpu_has_topoext		boot_cpu_has(X86_FEATURE_TOPOEXT)

#define cpu_has_bpext		boot_cpu_has(X86_FEATURE_BPEXT)

/*

 * Do not add any more of those clumsy macros - use static_cpu_has_safe() for

 * fast paths and boot_cpu_has() otherwise!

 */



#if __GNUC__ >= 4

extern void warn_pre_alternatives(void);