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Commit 35e2916f authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier 



Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init().  This causes a hang when cpuidle support is
enabled.  The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode.  It happens with the following call stack:

    cpuidle_register_governor()
        cpuidle_switch_governor()
            cpuidle_uninstall_idle_handler()
                synchronize_sched()
                    wait_rcu_gp()
                        wait_for_completion()

When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.

To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall.  This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.

Reported-by: default avatarKevin Hilman <khilman@kernel.org>
Fixes: 8fb76a07 ("ARM: imx6: set initial power mode in pm function")
Tested-by: default avatarKevin Hilman <khilman@linaro.org>
Tested-by: default avatarTyler Baker <tyler.baker@linaro.org>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent de8e434d

arch/arm/mach-imx/common.h

+1 −0
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ static inline void v7_cpu_resume(void) {} 
static inline void imx6_suspend(void __iomem *ocram_vbase) {}

#endif



void imx6_pm_ccm_init(const char *ccm_compat);

void imx6q_pm_init(void);

void imx6dl_pm_init(void);

void imx6sl_pm_init(void);

arch/arm/mach-imx/mach-imx6q.c

+1 −0
Original line number Diff line number Diff line
@@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void) 
	imx_init_l2cache();

	imx_src_init();

	irqchip_init();

	imx6_pm_ccm_init("fsl,imx6q-ccm");

}



static const char * const imx6q_dt_compat[] __initconst = {

arch/arm/mach-imx/mach-imx6sl.c

+1 −0
Original line number Diff line number Diff line
@@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void) 
	imx_init_l2cache();

	imx_src_init();

	irqchip_init();

	imx6_pm_ccm_init("fsl,imx6sl-ccm");

}



static const char * const imx6sl_dt_compat[] __initconst = {

arch/arm/mach-imx/mach-imx6sx.c

+1 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void) 
	imx_init_l2cache();

	imx_src_init();

	irqchip_init();

	imx6_pm_ccm_init("fsl,imx6sx-ccm");

}



static void __init imx6sx_init_late(void)

arch/arm/mach-imx/pm-imx6.c

+18 −10
Original line number Diff line number Diff line
@@ -89,7 +89,6 @@ struct imx6_pm_base { 


struct imx6_pm_socdata {

	u32 ddr_type;

	const char *ccm_compat;

	const char *mmdc_compat;

	const char *src_compat;

	const char *iomuxc_compat;
@@ -139,7 +138,6 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = { 
};



static const struct imx6_pm_socdata imx6q_pm_data __initconst = {

	.ccm_compat = "fsl,imx6q-ccm",

	.mmdc_compat = "fsl,imx6q-mmdc",

	.src_compat = "fsl,imx6q-src",

	.iomuxc_compat = "fsl,imx6q-iomuxc",
@@ -149,7 +147,6 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = { 
};



static const struct imx6_pm_socdata imx6dl_pm_data __initconst = {

	.ccm_compat = "fsl,imx6q-ccm",

	.mmdc_compat = "fsl,imx6q-mmdc",

	.src_compat = "fsl,imx6q-src",

	.iomuxc_compat = "fsl,imx6dl-iomuxc",
@@ -159,7 +156,6 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = { 
};



static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {

	.ccm_compat = "fsl,imx6sl-ccm",

	.mmdc_compat = "fsl,imx6sl-mmdc",

	.src_compat = "fsl,imx6sl-src",

	.iomuxc_compat = "fsl,imx6sl-iomuxc",
@@ -169,7 +165,6 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { 
};



static const struct imx6_pm_socdata imx6sx_pm_data __initconst = {

	.ccm_compat = "fsl,imx6sx-ccm",

	.mmdc_compat = "fsl,imx6sx-mmdc",

	.src_compat = "fsl,imx6sx-src",

	.iomuxc_compat = "fsl,imx6sx-iomuxc",
@@ -553,16 +548,11 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) 
static void __init imx6_pm_common_init(const struct imx6_pm_socdata

					*socdata)

{

	struct device_node *np;

	struct regmap *gpr;

	int ret;



	np = of_find_compatible_node(NULL, NULL, socdata->ccm_compat);

	ccm_base = of_iomap(np, 0);

	WARN_ON(!ccm_base);



	imx6_set_lpm(WAIT_CLOCKED);



	if (IS_ENABLED(CONFIG_SUSPEND)) {

		ret = imx6q_suspend_init(socdata);

		if (ret)
@@ -583,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata 
				   IMX6Q_GPR1_GINT);

}



void __init imx6_pm_ccm_init(const char *ccm_compat)

{

	struct device_node *np;

	u32 val;



	np = of_find_compatible_node(NULL, NULL, ccm_compat);

	ccm_base = of_iomap(np, 0);

	BUG_ON(!ccm_base);



	/*

	 * Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core

	 * clock being shut down unexpectedly by WAIT mode.

	 */

	val = readl_relaxed(ccm_base + CLPCR);

	val &= ~BM_CLPCR_LPM;

	writel_relaxed(val, ccm_base + CLPCR);

}



void __init imx6q_pm_init(void)

{

	imx6_pm_common_init(&imx6q_pm_data);