drm/msm/dp: set bpp and cc values correctly



DP_MISC1_MISC0 register was retaining its previous
bit_depth and colorimetry values. Set only current
values of bit_depth and cc values.

Change-Id: I806ae2bd4b7e615d02286c9d00226537656d26f4
Signed-off-by: Narender Ankam <nankam@codeaurora.org>

parent 9fed2226

drivers/gpu/drm/msm/dp/dp_catalog.c

+0 −2

Original line number	Diff line number	Diff line
		@@ -772,8 +772,6 @@ static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl,
		catalog = dp_catalog_get_priv(ctrl);
		io_data = catalog->io.dp_link;

		misc_val = dp_read(catalog, io_data, DP_MISC1_MISC0);
		misc_val \|= cc;
		misc_val \|= (tb << 5);
		misc_val \|= BIT(0); /* Configure clock to synchronous mode */