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Commit 3498409f authored by jilai wang's avatar jilai wang Committed by Rob Clark
Browse files

drm/msm/mdp: Add capabilities to MDP planes (v2) 



MDP planes can be implemented using different type of HW pipes,
RGB/VIG/DMA pipes for MDP5 and RGB/VG/DMA pipes for MDP4. Each type
of pipe has different HW capabilities such as scaling, color space
conversion, decimation... Add a variable in plane data structure
to specify the difference of each plane which comes from mdp5_cfg data
and use it to differenciate the plane operation.
V1: Initial change
V2: Fix a typo in mdp4_kms.h

Signed-off-by: default avatarJilai Wang <jilaiw@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent bef799fb

drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h

+8 −11
Original line number Diff line number Diff line
@@ -175,27 +175,24 @@ irqreturn_t mdp4_irq(struct msm_kms *kms); 
int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);



static inline bool pipe_supports_yuv(enum mdp4_pipe pipe)

static inline uint32_t mdp4_pipe_caps(enum mdp4_pipe pipe)

{

	switch (pipe) {

	case VG1:

	case VG2:

	case VG3:

	case VG4:

		return true;

		return MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_CSC;

	case RGB1:

	case RGB2:

	case RGB3:

		return MDP_PIPE_CAP_SCALE;

	default:

		return false;

		return 0;

	}

}



static inline

uint32_t mdp4_get_formats(enum mdp4_pipe pipe_id, uint32_t *pixel_formats,

		uint32_t max_formats)

{

	return mdp_get_formats(pixel_formats, max_formats,

				!pipe_supports_yuv(pipe_id));

}



enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane);

struct drm_plane *mdp4_plane_init(struct drm_device *dev,

		enum mdp4_pipe pipe_id, bool private_plane);

drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c

+5 −2
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ struct mdp4_plane { 


	enum mdp4_pipe pipe;



	uint32_t caps;

	uint32_t nformats;

	uint32_t formats[32];
@@ -382,9 +383,11 @@ struct drm_plane *mdp4_plane_init(struct drm_device *dev, 


	mdp4_plane->pipe = pipe_id;

	mdp4_plane->name = pipe_names[pipe_id];

	mdp4_plane->caps = mdp4_pipe_caps(pipe_id);



	mdp4_plane->nformats = mdp4_get_formats(pipe_id, mdp4_plane->formats,

			ARRAY_SIZE(mdp4_plane->formats));

	mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,

			ARRAY_SIZE(mdp4_plane->formats),

			!pipe_supports_yuv(mdp4_plane->caps));



	type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;

	ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,

drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c

+24 −2
Original line number Diff line number Diff line
@@ -45,14 +45,20 @@ const struct mdp5_cfg_hw msm8x74_config = { 
	.pipe_vig = {

		.count = 3,

		.base = { 0x01200, 0x01600, 0x01a00 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_CSC |

				MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_rgb = {

		.count = 3,

		.base = { 0x01e00, 0x02200, 0x02600 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_dma = {

		.count = 2,

		.base = { 0x02a00, 0x02e00 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP,

	},

	.lm = {

		.count = 5,
@@ -115,14 +121,20 @@ const struct mdp5_cfg_hw apq8084_config = { 
	.pipe_vig = {

		.count = 4,

		.base = { 0x01200, 0x01600, 0x01a00, 0x01e00 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_CSC |

				MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_rgb = {

		.count = 4,

		.base = { 0x02200, 0x02600, 0x02a00, 0x02e00 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_dma = {

		.count = 2,

		.base = { 0x03200, 0x03600 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP,

	},

	.lm = {

		.count = 6,
@@ -178,14 +190,20 @@ const struct mdp5_cfg_hw msm8x16_config = { 
	.pipe_vig = {

		.count = 1,

		.base = { 0x05000 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_CSC |

				MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_rgb = {

		.count = 2,

		.base = { 0x15000, 0x17000 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_dma = {

		.count = 1,

		.base = { 0x25000 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP,

	},

	.lm = {

		.count = 2, /* LM0 and LM3 */
@@ -239,16 +257,20 @@ const struct mdp5_cfg_hw msm8x94_config = { 
	.pipe_vig = {

		.count = 4,

		.base = { 0x05000, 0x07000, 0x09000, 0x0b000 },

		/* TODO: add decimation bit */

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_CSC |

				MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_rgb = {

		.count = 4,

		.base = { 0x15000, 0x17000, 0x19000, 0x1b000 },

		/* TODO: add decimation bit */

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP |

				MDP_PIPE_CAP_SCALE | MDP_PIPE_CAP_DECIMATION,

	},

	.pipe_dma = {

		.count = 2,

		.base = { 0x25000, 0x27000 },

		.caps = MDP_PIPE_CAP_HFLIP | MDP_PIPE_CAP_VFLIP,

	},

	.lm = {

		.count = 6,

drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h

+8 −3
Original line number Diff line number Diff line
@@ -46,6 +46,11 @@ struct mdp5_lm_block { 
	uint32_t max_height;

};



struct mdp5_pipe_block {

	MDP5_SUB_BLOCK_DEFINITION;

	uint32_t caps;			/* pipe capabilities */

};



struct mdp5_ctl_block {

	MDP5_SUB_BLOCK_DEFINITION;

	uint32_t flush_hw_mask;		/* FLUSH register's hardware mask */
@@ -72,9 +77,9 @@ struct mdp5_cfg_hw { 
	struct mdp5_sub_block mdp;

	struct mdp5_smp_block smp;

	struct mdp5_ctl_block ctl;

	struct mdp5_sub_block pipe_vig;

	struct mdp5_sub_block pipe_rgb;

	struct mdp5_sub_block pipe_dma;

	struct mdp5_pipe_block pipe_vig;

	struct mdp5_pipe_block pipe_rgb;

	struct mdp5_pipe_block pipe_dma;

	struct mdp5_lm_block  lm;

	struct mdp5_sub_block dspp;

	struct mdp5_sub_block ad;

drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c

+2 −2
Original line number Diff line number Diff line
@@ -372,7 +372,7 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) 
		struct drm_crtc *crtc;



		plane = mdp5_plane_init(dev, crtcs[i], true,

				hw_cfg->pipe_rgb.base[i]);

			hw_cfg->pipe_rgb.base[i], hw_cfg->pipe_rgb.caps);

		if (IS_ERR(plane)) {

			ret = PTR_ERR(plane);

			dev_err(dev->dev, "failed to construct plane for %s (%d)\n",
@@ -395,7 +395,7 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) 
		struct drm_plane *plane;



		plane = mdp5_plane_init(dev, pub_planes[i], false,

				hw_cfg->pipe_vig.base[i]);

			hw_cfg->pipe_vig.base[i], hw_cfg->pipe_vig.caps);

		if (IS_ERR(plane)) {

			ret = PTR_ERR(plane);

			dev_err(dev->dev, "failed to construct %s plane: %d\n",