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If preset value (bit 15) is enabled in sdhci host control2 register (0x3E), then the preset value registers(0x6F-0x60) would be used for some of the settings such as clock and drive strength. These are HW initialized registers and are not properly initialized by MSM SDHCI controller. This is resulting in low throughput for some of the modes such as DDR50/SDR50. Hence, do not enable it for MSM SDHCI. CRs-fixed: 474518 Change-Id: Iee1241355d14e6bcebc66c3a43abf1ec94d869c3 Signed-off-by:Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict] Signed-off-by:
Subhash Jadavani <subhashj@codeaurora.org> [xiaonian@codeaurora.org: fix trivial merge conflict] Signed-off-by:
Xiaonian Wang <xiaonian@codeaurora.org>