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Commit 30ebbde2 authored by Maulik Shah's avatar Maulik Shah
Browse files

ARM: dts: msm: Add PDC interrupt controller for sdm670 



Add pdc-gic interrupt controller as SOC interrupt parent
and as a child domain under intc. Modify TLMM's interrupt
parent as intc irq domain.

Change-Id: I5e2c72d9e1adff993c81d35f8e8a73c3e427ae2b
Signed-off-by: default avatarMaulik Shah <mkshah@codeaurora.org>
parent b5c0fa89

arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		interrupt-parent = <&pdc>;



		/* QUPv3 South SE mappings */

		/* SE 0 pin mappings */

arch/arm64/boot/dts/qcom/sdm670-pm.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -195,4 +195,12 @@ 
		reg = <0xc300000 0x1000>, <0xc3f0004 0x4>;

		reg-names = "phys_addr_base", "offset_addr";

	};



	pdc: interrupt-controller@b220000{

		compatible = "qcom,pdc-sdm670";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-parent = <&intc>;

		interrupt-controller;

	};

};

arch/arm64/boot/dts/qcom/sdm670-qupv3.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se6_4uart_active>;

		pinctrl-1 = <&qupv3_se6_4uart_sleep>;

		interrupts-extended = <&intc GIC_SPI 607 0>,

		interrupts-extended = <&pdc GIC_SPI 607 0>,

				<&tlmm 48 0>;

		status = "disabled";

		qcom,wakeup-byte = <0xFD>;
@@ -60,7 +60,7 @@ 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se7_4uart_active>;

		pinctrl-1 = <&qupv3_se7_4uart_sleep>;

		interrupts-extended = <&intc GIC_SPI 608 0>,

		interrupts-extended = <&pdc GIC_SPI 608 0>,

				<&tlmm 96 0>;

		status = "disabled";

		qcom,wakeup-byte = <0xFD>;

arch/arm64/boot/dts/qcom/sdm670.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 
	model = "Qualcomm Technologies, Inc. SDM670";

	compatible = "qcom,sdm670";

	qcom,msm-id = <336 0x0>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&pdc>;



	aliases {

		ufshc1 = &ufshc_mem; /* Embedded UFS slot */
@@ -416,6 +416,7 @@ 
		reg = <0x17a00000 0x10000>,     /* GICD */

		      <0x17a60000 0x100000>;    /* GICR * 8 */

		interrupts = <1 9 4>;

		interrupt-parent = <&intc>;

	};



	timer {