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Commit 30d72dd0 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: clk-cpu-osm: Rework the MEM_ACC_LEVEL setting logic 



The MEM_ACC_LEVEL settings that the OSM driver is currently
programming are off from those listed in the voltage plan.
Correct this.

Change-Id: I26c9907c4deb96dd84f57c84a3737b11996ccd04
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent a442baad

Documentation/devicetree/bindings/arm/msm/qcom,osm.txt

+33 −2
Original line number Diff line number Diff line
@@ -233,8 +233,6 @@ Properties: 
		    configuration registers for the Performance cluster.

		    The array must contain exactly three elements.



		    corresponding CPRh device.



- qcom,perfcl-apcs-mem-acc-threshold-voltage

	Usage:      optional

	Value type: <u32>
@@ -245,6 +243,27 @@ Properties: 
		    the MEM ACC threshold voltage specified for the

		    corresponding CPRh device.



- qcom,l3-memacc-level-vc-binX

	Usage:      required

	Value type: <prop-encoded-array>

	Definition: Array which defines the NOM and TURBO VCs for the L3 clock

		    on that BIN part.

		    The array must contain exactly two elements.



- qcom,pwrcl-memacc-level-vc-binX

	Usage:      required

	Value type: <prop-encoded-array>

	Definition: Array which defines the NOM and TURBO VCs for the Power

		    cluster clock on that BIN part.

		    The array must contain exactly two elements.



- qcom,perfcl-memacc-level-vc-binX

	Usage:      required

	Value type: <prop-encoded-array>

	Definition: Array which defines the NOM and TURBO VCs for the

		    Performance cluster clock on that BIN part.

		    The array must contain exactly two elements.



- qcom,apcs-cbc-addr

	Usage:      required

	Value type: <prop-encoded-array>
@@ -483,6 +502,18 @@ Example: 
			<  1881600000 0x404c1462 0x00004e4e 0x2 21 >,

			<  1958400000 0x404c1566 0x00005252 0x3 22 >;



		qcom,l3-memacc-level-vc-bin0 = <7 63>;

		qcom,l3-memacc-level-vc-bin1 = <7 9>;

		qcom,l3-memacc-level-vc-bin2 = <7 9>;



		qcom,pwrcl-memacc-level-vc-bin0 = <12 63>;

		qcom,pwrcl-memacc-level-vc-bin1 = <12 17>;

		qcom,pwrcl-memacc-level-vc-bin2 = <12 17>;



		qcom,perfcl-memacc-level-vc-bin0 = <12 18>;

		qcom,perfcl-memacc-level-vc-bin1 = <12 18>;

		qcom,perfcl-memacc-level-vc-bin2 = <12 18>;



		qcom,up-timer =

			<1000 1000 1000>;

		qcom,down-timer =

arch/arm64/boot/dts/qcom/sdm845-v2.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -537,6 +537,13 @@ 
		<  2553600000 0x40541c85 0x00006a6a 0x2 29 >,

		<  2630400000 0x40541d89 0x00006e6e 0x2 30 >,

		<  2707200000 0x40541e8d 0x00007171 0x2 31 >;



	qcom,l3-memacc-level-vc-bin0 = <8 13>;



	qcom,pwrcl-memacc-level-vc-bin0 = <12 16>;



	qcom,perfcl-memacc-level-vc-bin0 = <14 22>;

	qcom,perfcl-memacc-level-vc-bin1 = <14 22>;

};



&clock_gcc {

arch/arm64/boot/dts/qcom/sdm845.dtsi

+78 −66
Original line number Diff line number Diff line
@@ -1152,8 +1152,8 @@ 
			<   652800000 0x401c0422 0x00002020 0x1 5 >,

			<   729600000 0x401c0526 0x00002020 0x1 6 >,

			<   806400000 0x401c062a 0x00002222 0x1 7 >,

			<   883200000 0x4024072e 0x00002525 0x2 8 >,

			<   960000000 0x40240832 0x00002828 0x2 9 >;

			<   883200000 0x4024072e 0x00002525 0x1 8 >,

			<   960000000 0x40240832 0x00002828 0x1 9 >;



		qcom,l3-speedbin1-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1163,10 +1163,10 @@ 
			<   652800000 0x401c0422 0x00002020 0x1 5 >,

			<   729600000 0x401c0526 0x00002020 0x1 6 >,

			<   806400000 0x401c062a 0x00002222 0x1 7 >,

			<   883200000 0x4024072e 0x00002525 0x2 8 >,

			<   960000000 0x40240832 0x00002828 0x2 9 >,

			<  1036800000 0x40240936 0x00002b2b 0x3 10 >,

			<  1094400000 0x402c0a39 0x00002e2e 0x3 11 >;

			<   883200000 0x4024072e 0x00002525 0x1 8 >,

			<   960000000 0x40240832 0x00002828 0x1 9 >,

			<  1036800000 0x40240936 0x00002b2b 0x1 10 >,

			<  1094400000 0x402c0a39 0x00002e2e 0x1 11 >;



		qcom,l3-speedbin2-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1176,12 +1176,12 @@ 
			<   652800000 0x401c0422 0x00002020 0x1 5 >,

			<   729600000 0x401c0526 0x00002020 0x1 6 >,

			<   806400000 0x401c062a 0x00002222 0x1 7 >,

			<   883200000 0x4024072e 0x00002525 0x2 8 >,

			<   960000000 0x40240832 0x00002828 0x2 9 >,

			<  1036800000 0x40240936 0x00002b2b 0x3 10 >,

			<  1113600000 0x402c0a3a 0x00002e2e 0x3 11 >,

			<  1209600000 0x402c0b3f 0x00003232 0x3 12 >,

			<  1305600000 0x40340c44 0x00003636 0x3 13 >;

			<   883200000 0x4024072e 0x00002525 0x1 8 >,

			<   960000000 0x40240832 0x00002828 0x1 9 >,

			<  1036800000 0x40240936 0x00002b2b 0x1 10 >,

			<  1113600000 0x402c0a3a 0x00002e2e 0x1 11 >,

			<  1209600000 0x402c0b3f 0x00003232 0x1 12 >,

			<  1305600000 0x40340c44 0x00003636 0x1 13 >;



		qcom,pwrcl-speedbin0-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1196,11 +1196,11 @@ 
			<  1056000000 0x402c0937 0x00002c2c 0x1 10 >,

			<  1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,

			<  1209600000 0x402c0b3f 0x00003232 0x1 12 >,

			<  1286400000 0x40340c43 0x00003636 0x2 13 >,

			<  1363200000 0x40340d47 0x00003939 0x2 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x2 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x2 16 >,

			<  1593600000 0x403c1053 0x00004242 0x2 17 >;

			<  1286400000 0x40340c43 0x00003636 0x1 13 >,

			<  1363200000 0x40340d47 0x00003939 0x1 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x1 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x1 16 >,

			<  1593600000 0x403c1053 0x00004242 0x1 17 >;



		qcom,pwrcl-speedbin1-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1215,13 +1215,13 @@ 
			<  1056000000 0x402c0937 0x00002c2c 0x1 10 >,

			<  1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,

			<  1209600000 0x402c0b3f 0x00003232 0x1 12 >,

			<  1286400000 0x40340c43 0x00003636 0x2 13 >,

			<  1363200000 0x40340d47 0x00003939 0x2 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x2 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x2 16 >,

			<  1593600000 0x403c1053 0x00004242 0x2 17 >,

			<  1651200000 0x403c1156 0x00004545 0x3 18 >,

			<  1708800000 0x40441259 0x00004747 0x3 19 >;

			<  1286400000 0x40340c43 0x00003636 0x1 13 >,

			<  1363200000 0x40340d47 0x00003939 0x1 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x1 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x1 16 >,

			<  1593600000 0x403c1053 0x00004242 0x1 17 >,

			<  1651200000 0x403c1156 0x00004545 0x1 18 >,

			<  1708800000 0x40441259 0x00004747 0x1 19 >;



		qcom,pwrcl-speedbin2-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1236,13 +1236,13 @@ 
			<  1056000000 0x402c0937 0x00002c2c 0x1 10 >,

			<  1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,

			<  1209600000 0x402c0b3f 0x00003232 0x1 12 >,

			<  1286400000 0x40340c43 0x00003636 0x2 13 >,

			<  1363200000 0x40340d47 0x00003939 0x2 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x2 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x2 16 >,

			<  1593600000 0x403c1053 0x00004242 0x2 17 >,

			<  1670400000 0x40441157 0x00004646 0x3 18 >,

			<  1747200000 0x4044125b 0x00004949 0x3 19 >;

			<  1286400000 0x40340c43 0x00003636 0x1 13 >,

			<  1363200000 0x40340d47 0x00003939 0x1 14 >,

			<  1440000000 0x40340e4b 0x00003c3c 0x1 15 >,

			<  1516800000 0x403c0f4f 0x00003f3f 0x1 16 >,

			<  1593600000 0x403c1053 0x00004242 0x1 17 >,

			<  1670400000 0x40441157 0x00004646 0x1 18 >,

			<  1747200000 0x4044125b 0x00004949 0x1 19 >;



		qcom,perfcl-speedbin0-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1257,16 +1257,16 @@ 
			<  1036800000 0x40240936 0x00002b2b 0x1 10 >,

			<  1113600000 0x402c0a3a 0x00002e2e 0x1 11 >,

			<  1190400000 0x402c0b3e 0x00003232 0x1 12 >,

			<  1267200000 0x40340c42 0x00003535 0x2 13 >,

			<  1344000000 0x40340d46 0x00003838 0x2 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x2 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x2 16 >,

			<  1574400000 0x403c1052 0x00004242 0x2 17 >,

			<  1651200000 0x403c1156 0x00004545 0x2 18 >,

			<  1728000000 0x4044125a 0x00004848 0x3 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x3 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x3 21 >,

			<  1958400000 0x404c1566 0x00005252 0x3 22 >;

			<  1267200000 0x40340c42 0x00003535 0x1 13 >,

			<  1344000000 0x40340d46 0x00003838 0x1 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x1 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x1 16 >,

			<  1574400000 0x403c1052 0x00004242 0x1 17 >,

			<  1651200000 0x403c1156 0x00004545 0x1 18 >,

			<  1728000000 0x4044125a 0x00004848 0x1 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x1 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x1 21 >,

			<  1958400000 0x404c1566 0x00005252 0x1 22 >;



		qcom,perfcl-speedbin1-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1281,18 +1281,18 @@ 
			<  1036800000 0x40240936 0x00002b2b 0x1 10 >,

			<  1113600000 0x402c0a3a 0x00002e2e 0x1 11 >,

			<  1190400000 0x402c0b3e 0x00003232 0x1 12 >,

			<  1267200000 0x40340c42 0x00003535 0x2 13 >,

			<  1344000000 0x40340d46 0x00003838 0x2 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x2 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x2 16 >,

			<  1574400000 0x403c1052 0x00004242 0x2 17 >,

			<  1651200000 0x403c1156 0x00004545 0x2 18 >,

			<  1728000000 0x4044125a 0x00004848 0x3 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x3 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x3 21 >,

			<  1958400000 0x404c1566 0x00005252 0x3 22 >,

			<  2035200000 0x404c166a 0x00005555 0x3 23 >,

			<  2092800000 0x4054176d 0x00005757 0x3 24 >;

			<  1267200000 0x40340c42 0x00003535 0x1 13 >,

			<  1344000000 0x40340d46 0x00003838 0x1 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x1 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x1 16 >,

			<  1574400000 0x403c1052 0x00004242 0x1 17 >,

			<  1651200000 0x403c1156 0x00004545 0x1 18 >,

			<  1728000000 0x4044125a 0x00004848 0x1 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x1 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x1 21 >,

			<  1958400000 0x404c1566 0x00005252 0x1 22 >,

			<  2035200000 0x404c166a 0x00005555 0x1 23 >,

			<  2092800000 0x4054176d 0x00005757 0x1 24 >;



		qcom,perfcl-speedbin2-v0 =

			<   300000000 0x000c000f 0x00002020 0x1 1 >,
@@ -1307,19 +1307,31 @@ 
			<  1036800000 0x40240936 0x00002b2b 0x1 10 >,

			<  1113600000 0x402c0a3a 0x00002e2e 0x1 11 >,

			<  1190400000 0x402c0b3e 0x00003232 0x1 12 >,

			<  1267200000 0x40340c42 0x00003535 0x2 13 >,

			<  1344000000 0x40340d46 0x00003838 0x2 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x2 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x2 16 >,

			<  1574400000 0x403c1052 0x00004242 0x2 17 >,

			<  1651200000 0x403c1156 0x00004545 0x2 18 >,

			<  1728000000 0x4044125a 0x00004848 0x3 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x3 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x3 21 >,

			<  1958400000 0x404c1566 0x00005252 0x3 22 >,

			<  2035200000 0x404c166a 0x00005555 0x3 23 >,

			<  2112000000 0x4054176e 0x00005858 0x3 24 >,

			<  2208000000 0x40541873 0x00005c5c 0x3 25 >;

			<  1267200000 0x40340c42 0x00003535 0x1 13 >,

			<  1344000000 0x40340d46 0x00003838 0x1 14 >,

			<  1420800000 0x40340e4a 0x00003b3b 0x1 15 >,

			<  1497600000 0x403c0f4e 0x00003e3e 0x1 16 >,

			<  1574400000 0x403c1052 0x00004242 0x1 17 >,

			<  1651200000 0x403c1156 0x00004545 0x1 18 >,

			<  1728000000 0x4044125a 0x00004848 0x1 19 >,

			<  1804800000 0x4044135e 0x00004b4b 0x1 20 >,

			<  1881600000 0x404c1462 0x00004e4e 0x1 21 >,

			<  1958400000 0x404c1566 0x00005252 0x1 22 >,

			<  2035200000 0x404c166a 0x00005555 0x1 23 >,

			<  2112000000 0x4054176e 0x00005858 0x1 24 >,

			<  2208000000 0x40541873 0x00005c5c 0x1 25 >;



		qcom,l3-memacc-level-vc-bin0 = <7 63>;

		qcom,l3-memacc-level-vc-bin1 = <7 9>;

		qcom,l3-memacc-level-vc-bin2 = <7 9>;



		qcom,pwrcl-memacc-level-vc-bin0 = <12 63>;

		qcom,pwrcl-memacc-level-vc-bin1 = <12 17>;

		qcom,pwrcl-memacc-level-vc-bin2 = <12 17>;



		qcom,perfcl-memacc-level-vc-bin0 = <12 18>;

		qcom,perfcl-memacc-level-vc-bin1 = <12 18>;

		qcom,perfcl-memacc-level-vc-bin2 = <12 18>;



		qcom,up-timer =

			<1000 1000 1000>;

drivers/clk/qcom/clk-cpu-osm.c

+40 −30
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ 
#define MIN_VCO_VAL			0x2b



#define MAX_VC				63

#define MEM_ACC_LEVELS_LUT		2

#define MAX_MEM_ACC_LEVELS		3

#define MAX_MEM_ACC_VAL_PER_LEVEL	3

#define MAX_MEM_ACC_VALUES		(MAX_MEM_ACC_LEVELS * \
@@ -266,6 +267,7 @@ struct clk_osm { 
	u32 speedbin;

	u32 mem_acc_crossover_vc_addr;

	u32 mem_acc_addr[MEM_ACC_ADDRS];

	u32 mem_acc_level_vc[MEM_ACC_LEVELS_LUT];

	u32 ramp_ctl_addr;

	u32 apm_mode_ctl;

	u32 apm_status_ctl;
@@ -1045,21 +1047,6 @@ static inline int clk_osm_count_ns(struct clk_osm *c, u64 nsec) 


static void clk_osm_program_mem_acc_regs(struct clk_osm *c)

{

	int curr_level, i, j = 0;

	int mem_acc_level_map[MAX_MEM_ACC_LEVELS] = {MAX_VC, MAX_VC, MAX_VC};



	curr_level = c->osm_table[0].mem_acc_level;

	for (i = 0; i < c->num_entries; i++) {

		if (curr_level == MAX_MEM_ACC_LEVELS)

			break;



		if (c->osm_table[i].mem_acc_level != curr_level) {

			mem_acc_level_map[j++] =

				c->osm_table[i].virtual_corner;

			curr_level = c->osm_table[i].mem_acc_level;

		}

	}



	if (c->secure_init) {

		clk_osm_write_seq_reg(c,

				c->pbases[OSM_BASE] + MEMACC_CROSSOVER_VC,
@@ -1069,13 +1056,8 @@ static void clk_osm_program_mem_acc_regs(struct clk_osm *c) 
		clk_osm_write_seq_reg(c, c->mem_acc_addr[2], DATA_MEM(50));

		clk_osm_write_seq_reg(c, c->mem_acc_crossover_vc,

							DATA_MEM(78));

		clk_osm_write_seq_reg(c, mem_acc_level_map[0], DATA_MEM(79));

		if (c == &perfcl_clk)

			clk_osm_write_seq_reg(c, c->mem_acc_threshold_vc,

								DATA_MEM(80));

		else

			clk_osm_write_seq_reg(c, mem_acc_level_map[1],

								DATA_MEM(80));

		clk_osm_write_seq_reg(c, c->mem_acc_level_vc[0], DATA_MEM(79));

		clk_osm_write_seq_reg(c, c->mem_acc_level_vc[1], DATA_MEM(80));

		/*

		 * Note that DATA_MEM[81] -> DATA_MEM[89] values will be

		 * confirmed post-si. Use a value of 1 for DATA_MEM[89] and
@@ -1086,13 +1068,9 @@ static void clk_osm_program_mem_acc_regs(struct clk_osm *c) 
		scm_io_write(c->pbases[SEQ_BASE] + DATA_MEM(78),

						c->mem_acc_crossover_vc);

		scm_io_write(c->pbases[SEQ_BASE] + DATA_MEM(79),

						mem_acc_level_map[0]);

		if (c == &perfcl_clk)

						c->mem_acc_level_vc[0]);

		scm_io_write(c->pbases[SEQ_BASE] + DATA_MEM(80),

						c->mem_acc_threshold_vc);

		else

			scm_io_write(c->pbases[SEQ_BASE] + DATA_MEM(80),

						mem_acc_level_map[1]);

						c->mem_acc_level_vc[1]);

	}

}
@@ -1669,7 +1647,8 @@ static void clk_osm_misc_programming(struct clk_osm *c) 


	/* Program LVAL corresponding to first turbo VC */

	for (i = 0; i < c->num_entries; i++) {

		if (c->osm_table[i].mem_acc_level == MAX_MEM_ACC_LEVELS) {

		if (c->osm_table[i].virtual_corner ==

					c->mem_acc_level_vc[1]) {

			lval = c->osm_table[i].freq_data & GENMASK(7, 0);

			break;

		}
@@ -2288,6 +2267,7 @@ static int clk_osm_parse_dt_configs(struct platform_device *pdev) 
{

	struct device_node *of = pdev->dev.of_node;

	u32 *array;

	char memacc_str[40];

	int rc = 0;

	struct resource *res;
@@ -2507,6 +2487,36 @@ static int clk_osm_parse_dt_configs(struct platform_device *pdev) 
		return -ENOMEM;

	}



	snprintf(memacc_str, ARRAY_SIZE(memacc_str),

			"qcom,l3-memacc-level-vc-bin%d", l3_clk.speedbin);

	rc = of_property_read_u32_array(of, memacc_str, l3_clk.mem_acc_level_vc,

			MEM_ACC_LEVELS_LUT);

	if (rc) {

		dev_err(&pdev->dev, "unable to find %s property, rc=%d\n",

						memacc_str, rc);

		return rc;

	}



	snprintf(memacc_str, ARRAY_SIZE(memacc_str),

			"qcom,pwrcl-memacc-level-vc-bin%d", pwrcl_clk.speedbin);

	rc = of_property_read_u32_array(of, memacc_str,

			pwrcl_clk.mem_acc_level_vc, MEM_ACC_LEVELS_LUT);

	if (rc) {

		dev_err(&pdev->dev, "unable to find %s property, rc=%d\n",

			memacc_str, rc);

		return rc;

	}



	snprintf(memacc_str, ARRAY_SIZE(memacc_str),

		"qcom,perfcl-memacc-level-vc-bin%d", pwrcl_clk.speedbin);

	rc = of_property_read_u32_array(of, memacc_str,

			perfcl_clk.mem_acc_level_vc, MEM_ACC_LEVELS_LUT);

	if (rc) {

		dev_err(&pdev->dev, "unable to find %s property, rc=%d\n",

			memacc_str, rc);

		return rc;

	}



	l3_clk.secure_init = perfcl_clk.secure_init = pwrcl_clk.secure_init =

		of_property_read_bool(pdev->dev.of_node, "qcom,osm-no-tz");