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Commit 304664ea authored by Thierry Reding's avatar Thierry Reding
Browse files

ARM: tegra: Use a function to get the chip ID 



Instead of using a simple variable access to get at the Tegra chip ID,
use a function so that we can run additional code. This can be used to
determine where the chip ID is being accessed without being available.
That in turn will be handy for resolving boot sequence dependencies in
order to convert more code to regular initcalls rather than a sequence
fixed by Tegra SoC setup code.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent a0524acc

arch/arm/mach-tegra/cpuidle.c

+4 −3
Original line number Diff line number Diff line
@@ -24,12 +24,13 @@ 
#include <linux/kernel.h>

#include <linux/module.h>



#include "fuse.h"

#include <soc/tegra/fuse.h>



#include "cpuidle.h"



void __init tegra_cpuidle_init(void)

{

	switch (tegra_chip_id) {

	switch (tegra_get_chip_id()) {

	case TEGRA20:

		if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))

			tegra20_cpuidle_init();
@@ -49,7 +50,7 @@ void __init tegra_cpuidle_init(void) 


void tegra_cpuidle_pcie_irqs_in_use(void)

{

	switch (tegra_chip_id) {

	switch (tegra_get_chip_id()) {

	case TEGRA20:

		if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))

			tegra20_cpuidle_pcie_irqs_in_use();

arch/arm/mach-tegra/flowctrl.c

+4 −3
Original line number Diff line number Diff line
@@ -23,9 +23,10 @@ 
#include <linux/io.h>

#include <linux/kernel.h>



#include <soc/tegra/fuse.h>



#include "flowctrl.h"

#include "iomap.h"

#include "fuse.h"



static u8 flowctrl_offset_halt_cpu[] = {

	FLOW_CTRL_HALT_CPU0_EVENTS,
@@ -76,7 +77,7 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid) 
	int i;



	reg = flowctrl_read_cpu_csr(cpuid);

	switch (tegra_chip_id) {

	switch (tegra_get_chip_id()) {

	case TEGRA20:

		/* clear wfe bitmap */

		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
@@ -117,7 +118,7 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid) 


	/* Disable powergating via flow controller for CPU0 */

	reg = flowctrl_read_cpu_csr(cpuid);

	switch (tegra_chip_id) {

	switch (tegra_get_chip_id()) {

	case TEGRA20:

		/* clear wfe bitmap */

		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;

arch/arm/mach-tegra/fuse.c

+13 −6
Original line number Diff line number Diff line
@@ -51,7 +51,6 @@ 
int tegra_sku_id;

int tegra_cpu_process_id;

int tegra_core_process_id;

int tegra_chip_id;

int tegra_cpu_speedo_id;		/* only exist in Tegra30 and later */

int tegra_soc_speedo_id;

enum tegra_revision tegra_revision;
@@ -124,7 +123,7 @@ static enum tegra_revision tegra_get_revision(u32 id) 
	case 2:

		return TEGRA_REVISION_A02;

	case 3:

		if (tegra_chip_id == TEGRA20 &&

		if (tegra_get_chip_id() == TEGRA20 &&

			(tegra_spare_fuse(18) || tegra_spare_fuse(19)))

			return TEGRA_REVISION_A03p;

		else
@@ -155,6 +154,13 @@ u32 tegra_read_chipid(void) 
	return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);

}



u8 tegra_get_chip_id(void)

{

	u32 id = tegra_read_chipid();



	return (id >> 8) & 0xff;

}



static void __init tegra20_fuse_init_randomness(void)

{

	u32 randomness[2];
@@ -185,6 +191,7 @@ void __init tegra_init_fuse(void) 
{

	u32 id;

	u32 randomness[5];

	u8 chip_id;



	u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));

	reg |= 1 << 28;
@@ -209,9 +216,9 @@ void __init tegra_init_fuse(void) 


	id = tegra_read_chipid();

	randomness[2] = id;

	tegra_chip_id = (id >> 8) & 0xff;

	chip_id = (id >> 8) & 0xff;



	switch (tegra_chip_id) {

	switch (chip_id) {

	case TEGRA20:

		tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;

		tegra_init_speedo_data = &tegra20_init_speedo_data;
@@ -224,7 +231,7 @@ void __init tegra_init_fuse(void) 
		tegra_init_speedo_data = &tegra114_init_speedo_data;

		break;

	default:

		pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id);

		pr_warn("Tegra: unknown chip id %d\n", chip_id);

		tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;

		tegra_init_speedo_data = &tegra_get_process_id;

	}
@@ -235,7 +242,7 @@ void __init tegra_init_fuse(void) 
	randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id;



	add_device_randomness(randomness, sizeof(randomness));

	switch (tegra_chip_id) {

	switch (chip_id) {

	case TEGRA20:

		tegra20_fuse_init_randomness();

		break;

arch/arm/mach-tegra/fuse.h

+0 −6
Original line number Diff line number Diff line
@@ -26,11 +26,6 @@ 
#define SKU_ID_AP25E	27

#define SKU_ID_T25E	28



#define TEGRA20		0x20

#define TEGRA30		0x30

#define TEGRA114	0x35

#define TEGRA124	0x40



#ifndef __ASSEMBLY__

enum tegra_revision {

	TEGRA_REVISION_UNKNOWN = 0,
@@ -45,7 +40,6 @@ enum tegra_revision { 
extern int tegra_sku_id;

extern int tegra_cpu_process_id;

extern int tegra_core_process_id;

extern int tegra_chip_id;

extern int tegra_cpu_speedo_id;		/* only exist in Tegra30 and later */

extern int tegra_soc_speedo_id;

extern enum tegra_revision tegra_revision;

arch/arm/mach-tegra/hotplug.c

+6 −5
Original line number Diff line number Diff line
@@ -12,9 +12,10 @@ 
#include <linux/kernel.h>

#include <linux/smp.h>



#include <soc/tegra/fuse.h>



#include <asm/smp_plat.h>



#include "fuse.h"

#include "sleep.h"



static void (*tegra_hotplug_shutdown)(void);
@@ -52,12 +53,12 @@ void __init tegra_hotplug_init(void) 
	if (!IS_ENABLED(CONFIG_HOTPLUG_CPU))

		return;



	if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)

		tegra_hotplug_shutdown = tegra20_hotplug_shutdown;

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_chip_id == TEGRA30)

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)

		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114)

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)

		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124)

	if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)

		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;

}