Loading arch/x86/kernel/apic_32.c +0 −3 Original line number Diff line number Diff line Loading @@ -52,9 +52,6 @@ unsigned long mp_lapic_addr; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); Loading arch/x86/kernel/apic_64.c +0 −4 Original line number Diff line number Diff line Loading @@ -87,10 +87,6 @@ static unsigned long apic_phys; unsigned long mp_lapic_addr; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; EXPORT_SYMBOL(boot_cpu_physical_apicid); DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); Loading arch/x86/kernel/mpparse_32.c +0 −13 Original line number Diff line number Diff line Loading @@ -49,15 +49,6 @@ static int mp_current_pci_id; int pic_mode; /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; #ifndef CONFIG_X86_LOCAL_APIC unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* * Intel MP BIOS table parsing routines: */ Loading Loading @@ -93,9 +84,7 @@ static void __cpuinit MP_processor_info(struct mpc_config_processor *m) int apicid; if (!(m->mpc_cpuflag & CPU_ENABLED)) { #ifdef CONFIG_X86_SMP disabled_cpus++; #endif return; } Loading Loading @@ -817,9 +806,7 @@ void __cpuinit mp_register_lapic (int id, u8 enabled) } if (!enabled) { #ifdef CONFIG_X86_SMP ++disabled_cpus; #endif return; } Loading arch/x86/kernel/mpparse_64.c +0 −9 Original line number Diff line number Diff line Loading @@ -45,15 +45,6 @@ int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 }; static int mp_current_pci_id = 0; /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; #ifndef CONFIG_X86_LOCAL_APIC unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* * Intel MP BIOS table parsing routines: */ Loading arch/x86/kernel/setup.c +8 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,14 @@ #include <asm/mpspec.h> #include <asm/apicdef.h> unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; EXPORT_SYMBOL(boot_cpu_physical_apicid); physid_mask_t phys_cpu_present_map; DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid); Loading Loading
arch/x86/kernel/apic_32.c +0 −3 Original line number Diff line number Diff line Loading @@ -52,9 +52,6 @@ unsigned long mp_lapic_addr; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); Loading
arch/x86/kernel/apic_64.c +0 −4 Original line number Diff line number Diff line Loading @@ -87,10 +87,6 @@ static unsigned long apic_phys; unsigned long mp_lapic_addr; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; EXPORT_SYMBOL(boot_cpu_physical_apicid); DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); Loading
arch/x86/kernel/mpparse_32.c +0 −13 Original line number Diff line number Diff line Loading @@ -49,15 +49,6 @@ static int mp_current_pci_id; int pic_mode; /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; #ifndef CONFIG_X86_LOCAL_APIC unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* * Intel MP BIOS table parsing routines: */ Loading Loading @@ -93,9 +84,7 @@ static void __cpuinit MP_processor_info(struct mpc_config_processor *m) int apicid; if (!(m->mpc_cpuflag & CPU_ENABLED)) { #ifdef CONFIG_X86_SMP disabled_cpus++; #endif return; } Loading Loading @@ -817,9 +806,7 @@ void __cpuinit mp_register_lapic (int id, u8 enabled) } if (!enabled) { #ifdef CONFIG_X86_SMP ++disabled_cpus; #endif return; } Loading
arch/x86/kernel/mpparse_64.c +0 −9 Original line number Diff line number Diff line Loading @@ -45,15 +45,6 @@ int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 }; static int mp_current_pci_id = 0; /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; #ifndef CONFIG_X86_LOCAL_APIC unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* * Intel MP BIOS table parsing routines: */ Loading
arch/x86/kernel/setup.c +8 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,14 @@ #include <asm/mpspec.h> #include <asm/apicdef.h> unsigned int num_processors; unsigned disabled_cpus __cpuinitdata; /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; EXPORT_SYMBOL(boot_cpu_physical_apicid); physid_mask_t phys_cpu_present_map; DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid); Loading