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Commit 2fdaf79e authored by Shadab Naseem's avatar Shadab Naseem
Browse files

msm: platsmp: Update the scm call for setting boot address 



Update the scm call for setting boot address for secondary
cores. With the updated TZ 4.0, the previous scm call was failing
to set the boot address. Taking reference from 3.18 platsmp
'commit 883d4e0dc498 ("iio: imu: Add support to ASM330LHH")'.

Change-Id: I04889d60406926f57a81f4b053dcf2c75552332d
Signed-off-by: default avatarJagadeesh Banisetti <jbanis@codeaurora.org>
Signed-off-by: default avatarShadab Naseem <snaseem@codeaurora.org>
parent e4fab30e

arch/arm/mach-qcom/platsmp.c

+14 −5
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
#ifdef CONFIG_MSM_PM_LEGACY

#include <soc/qcom/pm-legacy.h>

#endif



#include <soc/qcom/scm-boot.h>

#define MSM_APCS_IDR 0x0B011030



/* Base Address of APC IPC block */
@@ -434,10 +434,19 @@ static int kpssv2_boot_secondary(unsigned int cpu, struct task_struct *idle) 


static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)

{

	int cpu;

	int cpu, map;

	u32 aff0_mask = 0;

	u32 aff1_mask = 0;

	u32 aff2_mask = 0;



	if (qcom_scm_set_cold_boot_addr(secondary_startup_arm,

					cpu_present_mask)) {

	for_each_present_cpu(cpu) {

		map = cpu_logical_map(cpu);

		aff0_mask |= BIT(MPIDR_AFFINITY_LEVEL(map, 0));

		aff1_mask |= BIT(MPIDR_AFFINITY_LEVEL(map, 1));

		aff2_mask |= BIT(MPIDR_AFFINITY_LEVEL(map, 2));

	}

	if (scm_set_boot_addr_mc(virt_to_phys(secondary_startup_arm),

		aff0_mask, aff1_mask, aff2_mask, SCM_FLAG_COLDBOOT_MC)) {

		for_each_present_cpu(cpu) {

			if (cpu == smp_processor_id())

				continue;