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Commit 2f7dceed authored by Axel Lin's avatar Axel Lin Committed by Mark Brown
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ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000 



MCLKDIV bit of Register 04h Clocking1:
	0 : Divide by 1
	1 : Divide by 2

Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.

Signed-off-by: default avatarAxel Lin <axel.lin@gmail.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
parent 08b1a384

sound/soc/codecs/wm8961.c

+1 −1
Original line number Diff line number Diff line
@@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id, 
		freq /= 2;

	} else {

		dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);

		reg &= WM8961_MCLKDIV;

		reg &= ~WM8961_MCLKDIV;

	}



	snd_soc_write(codec, WM8961_CLOCKING1, reg);