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Commit 2f34c884 authored by Harsh Sahu's avatar Harsh Sahu
Browse files

drm/msm/gem: move msm_gem cache flush api before copy 



msm_gem object allocates the memory using kzalloc or vmalloc based on
memory size requirement. This is cacheable memory and must be flushed
before any cpu access on it.
This change moves the sync api before copying the data in the buffer to
make sure it has the recent content.

Change-Id: Ide39582023862b75dccdeb1461e1abd5f9977f94
Signed-off-by: default avatarHarsh Sahu <hsahu@codeaurora.org>
parent 11f2cc4d

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+2 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -1072,10 +1072,10 @@ static int dsi_message_tx(struct dsi_ctrl *dsi_ctrl, 


		cmdbuf = (u8 *)(dsi_ctrl->vaddr);



		msm_gem_sync(dsi_ctrl->tx_cmd_buf);

		for (cnt = 0; cnt < length; cnt++)

			cmdbuf[dsi_ctrl->cmd_len + cnt] = buffer[cnt];



		msm_gem_sync(dsi_ctrl->tx_cmd_buf);

		dsi_ctrl->cmd_len += length;



		if (!(msg->flags & MIPI_DSI_MSG_LASTCOMMAND)) {

drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1.c

+2 −2
Original line number Diff line number Diff line 
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -474,6 +474,7 @@ static int write_kick_off_v1(struct sde_reg_dma_kickoff_cfg *cfg) 
	struct sde_hw_blk_reg_map hw;



	memset(&hw, 0, sizeof(hw));

	msm_gem_sync(cfg->dma_buf->buf);

	cmd1 = (cfg->op == REG_DMA_READ) ?

		(dspp_read_sel[cfg->block_select] << 30) : 0;

	cmd1 |= (cfg->last_command) ? BIT(24) : 0;
@@ -481,7 +482,6 @@ static int write_kick_off_v1(struct sde_reg_dma_kickoff_cfg *cfg) 
	cmd1 |= (cfg->op == REG_DMA_WRITE) ? (BIT(22)) : 0;

	cmd1 |= (SIZE_DWORD(cfg->dma_buf->index) & MAX_DWORDS_SZ);



	msm_gem_sync(cfg->dma_buf->buf);

	SET_UP_REG_DMA_REG(hw, reg_dma);

	SDE_REG_WRITE(&hw, REG_DMA_OP_MODE_OFF, BIT(0));

	SDE_REG_WRITE(&hw, reg_dma_clear_status_off,