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Commit 2f1cb96d authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv40/fb: enable z compression 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent fd3a5225

drivers/gpu/drm/nouveau/core/include/subdev/fb.h

+3 −0
Original line number Diff line number Diff line
@@ -151,6 +151,9 @@ int nv30_fb_init(struct nouveau_object *); 
void nv30_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,

		       u32 pitch, u32 flags, struct nouveau_fb_tile *);



void nv40_fb_tile_comp(struct nouveau_fb *, int i, u32 size, u32 flags,

		       struct nouveau_fb_tile *);



int  nv41_fb_vram_init(struct nouveau_fb *);

int  nv41_fb_init(struct nouveau_object *);

void nv41_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);

drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c

+14 −3
Original line number Diff line number Diff line
@@ -42,14 +42,25 @@ nv40_fb_vram_init(struct nouveau_fb *pfb) 
	}



	pfb->ram.size  =  nv_rd32(pfb, 0x10020c) & 0xff000000;

	pfb->ram.parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1;

	return nv_rd32(pfb, 0x100320);

}



static void

void

nv40_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags,

		  struct nouveau_fb_tile *tile)

{

	tile->zcomp = 0x00000000;

	u32 tiles = DIV_ROUND_UP(size, 0x80);

	u32 tags  = round_up(tiles / pfb->ram.parts, 0x100);

	if ( (flags & 2) &&

	    !nouveau_mm_head(&pfb->tags, 1, tags, tags, 1, &tile->tag)) {

		tile->zcomp  = 0x24000000; /* Z24S8_SPLIT */

		tile->zcomp |= ((tile->tag->offset           ) >> 8);

		tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13;

#ifdef __BIG_ENDIAN

		tile->zcomp |= 0x40000000;

#endif

	}

}



static int

drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c

+3 −1
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ nv41_fb_vram_init(struct nouveau_fb *pfb) 
		pfb->ram.type = NV_MEM_TYPE_DDR1;



	pfb->ram.size =   nv_rd32(pfb, 0x10020c) & 0xff000000;

	pfb->ram.parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1;

	return nv_rd32(pfb, 0x100320);

}
@@ -86,6 +87,7 @@ nv41_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->base.ram.init = nv41_fb_vram_init;

	priv->base.tile.regions = 12;

	priv->base.tile.init = nv30_fb_tile_init;

	priv->base.tile.comp = nv40_fb_tile_comp;

	priv->base.tile.fini = nv20_fb_tile_fini;

	priv->base.tile.prog = nv41_fb_tile_prog;

	return nouveau_fb_preinit(&priv->base);

drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ nv47_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->base.ram.init = nv41_fb_vram_init;

	priv->base.tile.regions = 15;

	priv->base.tile.init = nv30_fb_tile_init;

	priv->base.tile.comp = nv40_fb_tile_comp;

	priv->base.tile.fini = nv20_fb_tile_fini;

	priv->base.tile.prog = nv41_fb_tile_prog;

	return nouveau_fb_preinit(&priv->base);

drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c

+3 −1
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ nv49_fb_vram_init(struct nouveau_fb *pfb) 
	}



	pfb->ram.size =   nv_rd32(pfb, 0x10020c) & 0xff000000;

	pfb->ram.parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1;

	return nv_rd32(pfb, 0x100320);

}
@@ -63,6 +64,7 @@ nv49_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->base.ram.init = nv49_fb_vram_init;

	priv->base.tile.regions = 15;

	priv->base.tile.init = nv30_fb_tile_init;

	priv->base.tile.comp = nv40_fb_tile_comp;

	priv->base.tile.fini = nv20_fb_tile_fini;

	priv->base.tile.prog = nv41_fb_tile_prog;