Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2eeb321f authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-arm-for-v4.8-rc3' of...

Merge tag 'kvm-arm-for-v4.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/ARM Fixes for v4.8-rc3

This tag contains the following fixes on top of v4.8-rc1:
 - ITS init issues
 - ITS error handling issues
 - ITS IRQ leakage fix
 - Plug a couple of ITS race conditions
 - An erratum workaround for timers
 - Some removal of misleading use of errors and comments
 - A fix for GICv3 on 32-bit guests
parents c95ba92a f7f6f2d9
Loading
Loading
Loading
Loading
+1 −0
Original line number Original line Diff line number Diff line
@@ -53,6 +53,7 @@ stable kernels.
| ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075    |
| ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075    |
| ARM            | Cortex-A57      | #852523         | N/A                     |
| ARM            | Cortex-A57      | #852523         | N/A                     |
| ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220    |
| ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220    |
| ARM            | Cortex-A72      | #853709         | N/A                     |
| ARM            | MMU-500         | #841119,#826419 | N/A                     |
| ARM            | MMU-500         | #841119,#826419 | N/A                     |
|                |                 |                 |                         |
|                |                 |                 |                         |
| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375    |
| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375    |
+1 −1
Original line number Original line Diff line number Diff line
@@ -1309,7 +1309,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
	smp_rmb();
	smp_rmb();


	pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
	pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
	if (is_error_pfn(pfn))
	if (is_error_noslot_pfn(pfn))
		return -EFAULT;
		return -EFAULT;


	if (kvm_is_device_pfn(pfn)) {
	if (kvm_is_device_pfn(pfn)) {
+1 −1
Original line number Original line Diff line number Diff line
@@ -256,7 +256,7 @@ static int __hyp_text __guest_run(struct kvm_vcpu *vcpu)


	/*
	/*
	 * We must restore the 32-bit state before the sysregs, thanks
	 * We must restore the 32-bit state before the sysregs, thanks
	 * to Cortex-A57 erratum #852523.
	 * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72).
	 */
	 */
	__sysreg32_restore_state(vcpu);
	__sysreg32_restore_state(vcpu);
	__sysreg_restore_guest_state(guest_ctxt);
	__sysreg_restore_guest_state(guest_ctxt);
+1 −9
Original line number Original line Diff line number Diff line
@@ -823,14 +823,6 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
 * Architected system registers.
 * Architected system registers.
 * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
 * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
 *
 *
 * We could trap ID_DFR0 and tell the guest we don't support performance
 * monitoring.  Unfortunately the patch to make the kernel check ID_DFR0 was
 * NAKed, so it will read the PMCR anyway.
 *
 * Therefore we tell the guest we have 0 counters.  Unfortunately, we
 * must always support PMCCNTR (the cycle counter): we just RAZ/WI for
 * all PM registers, which doesn't crash the guest kernel at least.
 *
 * Debug handling: We do trap most, if not all debug related system
 * Debug handling: We do trap most, if not all debug related system
 * registers. The implementation is good enough to ensure that a guest
 * registers. The implementation is good enough to ensure that a guest
 * can use these with minimal performance degradation. The drawback is
 * can use these with minimal performance degradation. The drawback is
@@ -1360,7 +1352,7 @@ static const struct sys_reg_desc cp15_regs[] = {
	{ Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 },
	{ Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 },


	/* ICC_SRE */
	/* ICC_SRE */
	{ Op1( 0), CRn(12), CRm(12), Op2( 5), trap_raz_wi },
	{ Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre },


	{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },
	{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },


+1 −0
Original line number Original line Diff line number Diff line
@@ -337,6 +337,7 @@
 */
 */
#define E_ITS_MOVI_UNMAPPED_INTERRUPT		0x010107
#define E_ITS_MOVI_UNMAPPED_INTERRUPT		0x010107
#define E_ITS_MOVI_UNMAPPED_COLLECTION		0x010109
#define E_ITS_MOVI_UNMAPPED_COLLECTION		0x010109
#define E_ITS_INT_UNMAPPED_INTERRUPT		0x010307
#define E_ITS_CLEAR_UNMAPPED_INTERRUPT		0x010507
#define E_ITS_CLEAR_UNMAPPED_INTERRUPT		0x010507
#define E_ITS_MAPD_DEVICE_OOR			0x010801
#define E_ITS_MAPD_DEVICE_OOR			0x010801
#define E_ITS_MAPC_PROCNUM_OOR			0x010902
#define E_ITS_MAPC_PROCNUM_OOR			0x010902
Loading