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Commit 2e8c8ba9 authored by Stepan Moskovchenko's avatar Stepan Moskovchenko Committed by David Brown
Browse files

msm: iommu: Use ASID tagging instead of VMID tagging 



Use ASID tags in the TLB instead of VMID tags in
preparation for changes to the secure environment.

Signed-off-by: default avatarStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: default avatarDavid Brown <davidb@codeaurora.org>
parent b61401ad

arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.

/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -68,6 +68,7 @@ do { \ 
#define FL_CACHEABLE		(1 << 3)

#define FL_TEX0			(1 << 12)

#define FL_OFFSET(va)		(((va) & 0xFFF00000) >> 20)

#define FL_NG			(1 << 17)



/* Second-level page table bits */

#define SL_BASE_MASK_LARGE	0xFFFF0000
@@ -81,6 +82,7 @@ do { \ 
#define SL_CACHEABLE		(1 << 3)

#define SL_TEX0			(1 << 6)

#define SL_OFFSET(va)		(((va) & 0xFF000) >> 12)

#define SL_NG			(1 << 11)



/* Memory type and cache policy attributes */

#define MT_SO			0

arch/arm/mach-msm/iommu.c

+4 −5
Original line number Diff line number Diff line
@@ -137,7 +137,6 @@ static void __reset_context(void __iomem *base, int ctx) 
	SET_TLBLKCR(base, ctx, 0);

	SET_PRRR(base, ctx, 0);

	SET_NMRR(base, ctx, 0);

	SET_CONTEXTIDR(base, ctx, 0);

}



static void __program_context(void __iomem *base, int ctx, phys_addr_t pgtable)
@@ -418,11 +417,11 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, 
		for (i = 0; i < 16; i++)

			*(fl_pte+i) = (pa & 0xFF000000) | FL_SUPERSECTION |

				  FL_AP_READ | FL_AP_WRITE | FL_TYPE_SECT |

				  FL_SHARED | pgprot;

				  FL_SHARED | FL_NG | pgprot;

	}



	if (len == SZ_1M)

		*fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE |

		*fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE | FL_NG |

					    FL_TYPE_SECT | FL_SHARED | pgprot;



	/* Need a 2nd level table */
@@ -447,7 +446,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, 




	if (len == SZ_4K)

		*sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 |

		*sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 | SL_NG |

					  SL_SHARED | SL_TYPE_SMALL | pgprot;



	if (len == SZ_64K) {
@@ -455,7 +454,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, 


		for (i = 0; i < 16; i++)

			*(sl_pte+i) = (pa & SL_BASE_MASK_LARGE) | SL_AP0 |

				SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot;

			    SL_NG | SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot;

	}



	ret = __flush_iotlb(domain);

arch/arm/mach-msm/iommu_dev.c

+7 −4
Original line number Diff line number Diff line
@@ -330,14 +330,17 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev) 
		SET_M2VCBR_N(drvdata->base, mid, 0);

		SET_CBACR_N(drvdata->base, c->num, 0);



		/* Set VMID = MID */

		SET_VMID(drvdata->base, mid, mid);

		/* Set VMID = 0 */

		SET_VMID(drvdata->base, mid, 0);



		/* Set the context number for that MID to this context */

		SET_CBNDX(drvdata->base, mid, c->num);



		/* Set MID associated with this context bank */

		SET_CBVMID(drvdata->base, c->num, mid);

		/* Set MID associated with this context bank to 0*/

		SET_CBVMID(drvdata->base, c->num, 0);



		/* Set the ASID for TLB tagging for this context */

		SET_CONTEXTIDR_ASID(drvdata->base, c->num, c->num);



		/* Set security bit override to be Non-secure */

		SET_NSCFG(drvdata->base, mid, 3);