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Commit 2e0f35c0 authored by YunQiang Su's avatar YunQiang Su Committed by Greg Kroah-Hartman
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Disable MSI also when pcie-octeon.pcie_disable on 



commit a214720cbf50cd8c3f76bbb9c3f5c283910e9d33 upstream.

Octeon has an boot-time option to disable pcie.

Since MSI depends on PCI-E, we should also disable MSI also with
this option is on in order to avoid inadvertently accessing PCIe
registers.

Signed-off-by: default avatarYunQiang Su <ysu@wavecomp.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: pburton@wavecomp.com
Cc: linux-mips@vger.kernel.org
Cc: aaro.koskinen@iki.fi
Cc: stable@vger.kernel.org # v3.3+
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3ec9b775

arch/mips/pci/msi-octeon.c

+3 −1
Original line number Diff line number Diff line
@@ -369,7 +369,9 @@ int __init octeon_msi_initialize(void) 
	int irq;

	struct irq_chip *msi;



	if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) {

	if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_INVALID) {

		return 0;

	} else if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) {

		msi_rcv_reg[0] = CVMX_PEXP_NPEI_MSI_RCV0;

		msi_rcv_reg[1] = CVMX_PEXP_NPEI_MSI_RCV1;

		msi_rcv_reg[2] = CVMX_PEXP_NPEI_MSI_RCV2;