Loading arch/arm/mach-mx2/Kconfig +8 −0 Original line number Diff line number Diff line Loading @@ -59,4 +59,12 @@ config MACH_MX27_3DS help Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. config MACH_MX27LITE bool "LogicPD MX27 LITEKIT platform" depends on MACH_MX27 help Include support for MX27 LITEKIT platform. This includes specific configurations for the board and its peripherals. endif arch/arm/mach-mx2/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -16,3 +16,5 @@ obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o arch/arm/mach-mx2/clock_imx21.c +51 −26 Original line number Diff line number Diff line Loading @@ -48,6 +48,25 @@ static void _clk_disable(struct clk *clk) __raw_writel(reg, clk->enable_reg); } static unsigned long _clk_generic_round_rate(struct clk *clk, unsigned long rate, u32 max_divisor) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > max_divisor) div = max_divisor; return parent_rate / div; } static int _clk_spll_enable(struct clk *clk) { u32 reg; Loading Loading @@ -78,19 +97,7 @@ static void _clk_spll_disable(struct clk *clk) static unsigned long _clk_perclkx_round_rate(struct clk *clk, unsigned long rate) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > 64) div = 64; return parent_rate / div; return _clk_generic_round_rate(clk, rate, 64); } static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) Loading Loading @@ -130,6 +137,32 @@ static unsigned long _clk_usb_recalc(struct clk *clk) return parent_rate / (usb_pdf + 1U); } static unsigned long _clk_usb_round_rate(struct clk *clk, unsigned long rate) { return _clk_generic_round_rate(clk, rate, 8); } static int _clk_usb_set_rate(struct clk *clk, unsigned long rate) { u32 reg; u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (div > 8 || div < 1 || ((parent_rate / div) != rate)) return -EINVAL; div--; reg = CSCR() & ~CCM_CSCR_USB_MASK; reg |= div << CCM_CSCR_USB_OFFSET; __raw_writel(reg, CCM_CSCR); return 0; } static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf) { unsigned long parent_rate; Loading Loading @@ -595,11 +628,14 @@ static struct clk csi_clk[] = { static struct clk usb_clk[] = { { .parent = &spll_clk, .secondary = &usb_clk[1], .get_rate = _clk_usb_recalc, .enable = _clk_enable, .enable_reg = CCM_PCCR_USBOTG_REG, .enable_shift = CCM_PCCR_USBOTG_OFFSET, .disable = _clk_disable, .round_rate = _clk_usb_round_rate, .set_rate = _clk_usb_set_rate, }, { .parent = &hclk_clk, .enable = _clk_enable, Loading Loading @@ -768,18 +804,7 @@ static struct clk rtc_clk = { static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > 8) div = 8; return parent_rate / div; return _clk_generic_round_rate(clk, rate, 8); } static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) Loading Loading @@ -921,7 +946,7 @@ static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0]) _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0]) _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) Loading arch/arm/mach-mx2/mx27lite.c 0 → 100644 +95 −0 Original line number Diff line number Diff line /* * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) * Copyright 2009 Daniel Schaeffer (daniel.schaeffer@timesys.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/platform_device.h> #include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> #include <mach/hardware.h> #include <mach/common.h> #include <mach/imx-uart.h> #include <mach/iomux.h> #include <mach/board-mx27lite.h> #include "devices.h" static unsigned int mx27lite_pins[] = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, PE14_PF_UART1_CTS, PE15_PF_UART1_RTS, /* FEC */ PD0_AIN_FEC_TXD0, PD1_AIN_FEC_TXD1, PD2_AIN_FEC_TXD2, PD3_AIN_FEC_TXD3, PD4_AOUT_FEC_RX_ER, PD5_AOUT_FEC_RXD1, PD6_AOUT_FEC_RXD2, PD7_AOUT_FEC_RXD3, PD8_AF_FEC_MDIO, PD9_AIN_FEC_MDC, PD10_AOUT_FEC_CRS, PD11_AOUT_FEC_TX_CLK, PD12_AOUT_FEC_RXD0, PD13_AOUT_FEC_RX_DV, PD14_AOUT_FEC_RX_CLK, PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, }; static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; static struct platform_device *platform_devices[] __initdata = { &mxc_fec_device, }; static void __init mx27lite_init(void) { mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), "imx27lite"); mxc_register_device(&mxc_uart_device0, &uart_pdata); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } static void __init mx27lite_timer_init(void) { mx27_clocks_init(26000000); } static struct sys_timer mx27lite_timer = { .init = mx27lite_timer_init, }; MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") .phys_io = AIPI_BASE_ADDR, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mxc_init_irq, .init_machine = mx27lite_init, .timer = &mx27lite_timer, MACHINE_END arch/arm/mach-mx2/mx27pdk.c +1 −1 Original line number Diff line number Diff line Loading @@ -88,7 +88,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") .phys_io = AIPI_BASE_ADDR, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mxc_map_io, .map_io = mx27_map_io, .init_irq = mxc_init_irq, .init_machine = mx27pdk_init, .timer = &mx27pdk_timer, Loading Loading
arch/arm/mach-mx2/Kconfig +8 −0 Original line number Diff line number Diff line Loading @@ -59,4 +59,12 @@ config MACH_MX27_3DS help Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. config MACH_MX27LITE bool "LogicPD MX27 LITEKIT platform" depends on MACH_MX27 help Include support for MX27 LITEKIT platform. This includes specific configurations for the board and its peripherals. endif
arch/arm/mach-mx2/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -16,3 +16,5 @@ obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
arch/arm/mach-mx2/clock_imx21.c +51 −26 Original line number Diff line number Diff line Loading @@ -48,6 +48,25 @@ static void _clk_disable(struct clk *clk) __raw_writel(reg, clk->enable_reg); } static unsigned long _clk_generic_round_rate(struct clk *clk, unsigned long rate, u32 max_divisor) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > max_divisor) div = max_divisor; return parent_rate / div; } static int _clk_spll_enable(struct clk *clk) { u32 reg; Loading Loading @@ -78,19 +97,7 @@ static void _clk_spll_disable(struct clk *clk) static unsigned long _clk_perclkx_round_rate(struct clk *clk, unsigned long rate) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > 64) div = 64; return parent_rate / div; return _clk_generic_round_rate(clk, rate, 64); } static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) Loading Loading @@ -130,6 +137,32 @@ static unsigned long _clk_usb_recalc(struct clk *clk) return parent_rate / (usb_pdf + 1U); } static unsigned long _clk_usb_round_rate(struct clk *clk, unsigned long rate) { return _clk_generic_round_rate(clk, rate, 8); } static int _clk_usb_set_rate(struct clk *clk, unsigned long rate) { u32 reg; u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (div > 8 || div < 1 || ((parent_rate / div) != rate)) return -EINVAL; div--; reg = CSCR() & ~CCM_CSCR_USB_MASK; reg |= div << CCM_CSCR_USB_OFFSET; __raw_writel(reg, CCM_CSCR); return 0; } static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf) { unsigned long parent_rate; Loading Loading @@ -595,11 +628,14 @@ static struct clk csi_clk[] = { static struct clk usb_clk[] = { { .parent = &spll_clk, .secondary = &usb_clk[1], .get_rate = _clk_usb_recalc, .enable = _clk_enable, .enable_reg = CCM_PCCR_USBOTG_REG, .enable_shift = CCM_PCCR_USBOTG_OFFSET, .disable = _clk_disable, .round_rate = _clk_usb_round_rate, .set_rate = _clk_usb_set_rate, }, { .parent = &hclk_clk, .enable = _clk_enable, Loading Loading @@ -768,18 +804,7 @@ static struct clk rtc_clk = { static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) { u32 div; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); div = parent_rate / rate; if (parent_rate % rate) div++; if (div > 8) div = 8; return parent_rate / div; return _clk_generic_round_rate(clk, rate, 8); } static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) Loading Loading @@ -921,7 +946,7 @@ static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0]) _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0]) _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) Loading
arch/arm/mach-mx2/mx27lite.c 0 → 100644 +95 −0 Original line number Diff line number Diff line /* * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) * Copyright 2009 Daniel Schaeffer (daniel.schaeffer@timesys.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/platform_device.h> #include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> #include <mach/hardware.h> #include <mach/common.h> #include <mach/imx-uart.h> #include <mach/iomux.h> #include <mach/board-mx27lite.h> #include "devices.h" static unsigned int mx27lite_pins[] = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, PE14_PF_UART1_CTS, PE15_PF_UART1_RTS, /* FEC */ PD0_AIN_FEC_TXD0, PD1_AIN_FEC_TXD1, PD2_AIN_FEC_TXD2, PD3_AIN_FEC_TXD3, PD4_AOUT_FEC_RX_ER, PD5_AOUT_FEC_RXD1, PD6_AOUT_FEC_RXD2, PD7_AOUT_FEC_RXD3, PD8_AF_FEC_MDIO, PD9_AIN_FEC_MDC, PD10_AOUT_FEC_CRS, PD11_AOUT_FEC_TX_CLK, PD12_AOUT_FEC_RXD0, PD13_AOUT_FEC_RX_DV, PD14_AOUT_FEC_RX_CLK, PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, }; static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; static struct platform_device *platform_devices[] __initdata = { &mxc_fec_device, }; static void __init mx27lite_init(void) { mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), "imx27lite"); mxc_register_device(&mxc_uart_device0, &uart_pdata); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } static void __init mx27lite_timer_init(void) { mx27_clocks_init(26000000); } static struct sys_timer mx27lite_timer = { .init = mx27lite_timer_init, }; MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") .phys_io = AIPI_BASE_ADDR, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mxc_init_irq, .init_machine = mx27lite_init, .timer = &mx27lite_timer, MACHINE_END
arch/arm/mach-mx2/mx27pdk.c +1 −1 Original line number Diff line number Diff line Loading @@ -88,7 +88,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") .phys_io = AIPI_BASE_ADDR, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mxc_map_io, .map_io = mx27_map_io, .init_irq = mxc_init_irq, .init_machine = mx27pdk_init, .timer = &mx27pdk_timer, Loading