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Commit 2cda1880 authored Jan 08, 2015 by Thierry Reding

ARM: tegra: Fix unit address for Cortex-A9 TWD timer



The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.

Signed-off-by: Thierry Reding <treding@nvidia.com>

parent de47699d

arch/arm/boot/dts/tegra20.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -140,7 +140,7 @@
		};
		};

		timer@50004600 {
		timer@50040600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0x50040600 0x20>;
		interrupts = <GIC_PPI 13

arch/arm/boot/dts/tegra30.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -225,7 +225,7 @@
		};
		};

		timer@50004600 {
		timer@50040600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0x50040600 0x20>;
		interrupts = <GIC_PPI 13