Loading arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi +60 −0 Original line number Diff line number Diff line Loading @@ -1400,6 +1400,66 @@ }; }; spi6 { spi6_default: spi6_default { /* active state */ mux { /* MOSI, MISO, CLK */ pins = "gpio20", "gpio21", "gpio23"; function = "blsp_spi6"; }; config { pins = "gpio20", "gpio21", "gpio23"; drive-strength = <12>; /* 12 MA */ bias-disable = <0>; /* No PULL */ }; }; spi6_sleep: spi6_sleep { /* suspended state */ mux { /* MOSI, MISO, CLK */ pins = "gpio20", "gpio21", "gpio23"; function = "gpio"; }; config { pins = "gpio20", "gpio21", "gpio23"; drive-strength = <2>; /* 2 MA */ bias-pull-down; /* PULL Down */ }; }; spi6_cs0_active: cs0_active { /* CS */ mux { pins = "gpio22"; function = "blsp_spi6"; }; config { pins = "gpio22"; drive-strength = <2>; bias-disable = <0>; }; }; spi6_cs0_sleep: cs0_sleep { /* CS */ mux { pins = "gpio22"; function = "gpio"; }; config { pins = "gpio22"; drive-strength = <2>; bias-disable = <0>; }; }; }; /* add pingrp for touchscreen */ pmx_ts_int_active { ts_int_active: ts_int_active { Loading arch/arm64/boot/dts/qcom/msm8953.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ i2c3 = &i2c_3; i2c5 = &i2c_5; spi3 = &spi_3; spi6 = &spi_6; }; soc: soc { Loading Loading @@ -700,6 +701,33 @@ qcom,master-id = <86>; status = "disabled"; }; spi_6: spi@7af6000 { /* BLSP2 QUP2 */ compatible = "qcom,spi-qup-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "spi_physical", "spi_bam_physical"; reg = <0x7af6000 0x600>, <0x7ac4000 0x1f000>; interrupt-names = "spi_irq", "spi_bam_irq"; interrupts = <0 300 0>, <0 239 0>; spi-max-frequency = <19200000>; pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi6_default &spi6_cs0_active>; pinctrl-1 = <&spi6_sleep &spi6_cs0_sleep>; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup2_spi_apps_clk>; clock-names = "iface_clk", "core_clk"; qcom,infinite-mode = <0>; qcom,use-bam; qcom,use-pinctrl; qcom,ver-reg-exists; qcom,bam-consumer-pipe-index = <6>; qcom,bam-producer-pipe-index = <7>; qcom,master-id = <84>; status = "disabled"; }; i2c_1: i2c@78b5000 { /* BLSP1 QUP1 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; Loading Loading
arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi +60 −0 Original line number Diff line number Diff line Loading @@ -1400,6 +1400,66 @@ }; }; spi6 { spi6_default: spi6_default { /* active state */ mux { /* MOSI, MISO, CLK */ pins = "gpio20", "gpio21", "gpio23"; function = "blsp_spi6"; }; config { pins = "gpio20", "gpio21", "gpio23"; drive-strength = <12>; /* 12 MA */ bias-disable = <0>; /* No PULL */ }; }; spi6_sleep: spi6_sleep { /* suspended state */ mux { /* MOSI, MISO, CLK */ pins = "gpio20", "gpio21", "gpio23"; function = "gpio"; }; config { pins = "gpio20", "gpio21", "gpio23"; drive-strength = <2>; /* 2 MA */ bias-pull-down; /* PULL Down */ }; }; spi6_cs0_active: cs0_active { /* CS */ mux { pins = "gpio22"; function = "blsp_spi6"; }; config { pins = "gpio22"; drive-strength = <2>; bias-disable = <0>; }; }; spi6_cs0_sleep: cs0_sleep { /* CS */ mux { pins = "gpio22"; function = "gpio"; }; config { pins = "gpio22"; drive-strength = <2>; bias-disable = <0>; }; }; }; /* add pingrp for touchscreen */ pmx_ts_int_active { ts_int_active: ts_int_active { Loading
arch/arm64/boot/dts/qcom/msm8953.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ i2c3 = &i2c_3; i2c5 = &i2c_5; spi3 = &spi_3; spi6 = &spi_6; }; soc: soc { Loading Loading @@ -700,6 +701,33 @@ qcom,master-id = <86>; status = "disabled"; }; spi_6: spi@7af6000 { /* BLSP2 QUP2 */ compatible = "qcom,spi-qup-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "spi_physical", "spi_bam_physical"; reg = <0x7af6000 0x600>, <0x7ac4000 0x1f000>; interrupt-names = "spi_irq", "spi_bam_irq"; interrupts = <0 300 0>, <0 239 0>; spi-max-frequency = <19200000>; pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi6_default &spi6_cs0_active>; pinctrl-1 = <&spi6_sleep &spi6_cs0_sleep>; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup2_spi_apps_clk>; clock-names = "iface_clk", "core_clk"; qcom,infinite-mode = <0>; qcom,use-bam; qcom,use-pinctrl; qcom,ver-reg-exists; qcom,bam-consumer-pipe-index = <6>; qcom,bam-producer-pipe-index = <7>; qcom,master-id = <84>; status = "disabled"; }; i2c_1: i2c@78b5000 { /* BLSP1 QUP1 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; Loading