drm/amdgpu: change ELM/BAF to Polaris10/Polaris11 (2cc0c0b5) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+8 −8

Original line number	Original line	Diff line number	Diff line
	@@ -681,8 +681,8 @@ static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
	result = AMDGPU_UCODE_ID_CP_MEC1;		result = AMDGPU_UCODE_ID_CP_MEC1;
	break;		break;
	case CGS_UCODE_ID_CP_MEC_JT2:		case CGS_UCODE_ID_CP_MEC_JT2:
	if (adev->asic_type == CHIP_TONGA \|\| adev->asic_type == CHIP_BAFFIN		if (adev->asic_type == CHIP_TONGA \|\| adev->asic_type == CHIP_POLARIS11
	\|\| adev->asic_type == CHIP_ELLESMERE)		\|\| adev->asic_type == CHIP_POLARIS10)
	result = AMDGPU_UCODE_ID_CP_MEC2;		result = AMDGPU_UCODE_ID_CP_MEC2;
	else		else
	result = AMDGPU_UCODE_ID_CP_MEC1;		result = AMDGPU_UCODE_ID_CP_MEC1;
	@@ -742,17 +742,17 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
	case CHIP_FIJI:		case CHIP_FIJI:
	strcpy(fw_name, "amdgpu/fiji_smc.bin");		strcpy(fw_name, "amdgpu/fiji_smc.bin");
	break;		break;
	case CHIP_BAFFIN:		case CHIP_POLARIS11:
	if (type == CGS_UCODE_ID_SMU)		if (type == CGS_UCODE_ID_SMU)
	strcpy(fw_name, "amdgpu/baffin_smc.bin");		strcpy(fw_name, "amdgpu/polaris11_smc.bin");
	else if (type == CGS_UCODE_ID_SMU_SK)		else if (type == CGS_UCODE_ID_SMU_SK)
	strcpy(fw_name, "amdgpu/baffin_smc_sk.bin");		strcpy(fw_name, "amdgpu/polaris11_smc_sk.bin");
	break;		break;
	case CHIP_ELLESMERE:		case CHIP_POLARIS10:
	if (type == CGS_UCODE_ID_SMU)		if (type == CGS_UCODE_ID_SMU)
	strcpy(fw_name, "amdgpu/ellesmere_smc.bin");		strcpy(fw_name, "amdgpu/polaris10_smc.bin");
	else if (type == CGS_UCODE_ID_SMU_SK)		else if (type == CGS_UCODE_ID_SMU_SK)
	strcpy(fw_name, "amdgpu/ellesmere_smc_sk.bin");		strcpy(fw_name, "amdgpu/polaris10_smc_sk.bin");
	break;		break;
	default:		default:
	DRM_ERROR("SMC firmware not supported\n");		DRM_ERROR("SMC firmware not supported\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+4 −4

Original line number	Original line	Diff line number	Diff line
	@@ -59,8 +59,8 @@ static const char *amdgpu_asic_name[] = {
	"FIJI",		"FIJI",
	"CARRIZO",		"CARRIZO",
	"STONEY",		"STONEY",
	"ELLESMERE",		"POLARIS10",
	"BAFFIN",		"POLARIS11",
	"LAST",		"LAST",
	};		};

	@@ -1148,8 +1148,8 @@ static int amdgpu_early_init(struct amdgpu_device *adev)
	case CHIP_TOPAZ:		case CHIP_TOPAZ:
	case CHIP_TONGA:		case CHIP_TONGA:
	case CHIP_FIJI:		case CHIP_FIJI:
	case CHIP_BAFFIN:		case CHIP_POLARIS11:
	case CHIP_ELLESMERE:		case CHIP_POLARIS10:
	case CHIP_CARRIZO:		case CHIP_CARRIZO:
	case CHIP_STONEY:		case CHIP_STONEY:
	if (adev->asic_type == CHIP_CARRIZO \|\| adev->asic_type == CHIP_STONEY)		if (adev->asic_type == CHIP_CARRIZO \|\| adev->asic_type == CHIP_STONEY)

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+10 −10

drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c

+4 −2

Original line number	Original line	Diff line number	Diff line
	@@ -99,10 +99,12 @@ static int amdgpu_pp_early_init(void *handle)

	#ifdef CONFIG_DRM_AMD_POWERPLAY		#ifdef CONFIG_DRM_AMD_POWERPLAY
	switch (adev->asic_type) {		switch (adev->asic_type) {
			case CHIP_POLARIS11:
			case CHIP_POLARIS10:
			adev->pp_enabled = true;
			break;
	case CHIP_TONGA:		case CHIP_TONGA:
	case CHIP_FIJI:		case CHIP_FIJI:
	case CHIP_BAFFIN:
	case CHIP_ELLESMERE:
	adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;		adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;
	break;		break;
	case CHIP_CARRIZO:		case CHIP_CARRIZO:

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

+8 −8

Original line number	Original line	Diff line number	Diff line
	@@ -54,8 +54,8 @@
	#define FIRMWARE_CARRIZO "amdgpu/carrizo_uvd.bin"		#define FIRMWARE_CARRIZO "amdgpu/carrizo_uvd.bin"
	#define FIRMWARE_FIJI "amdgpu/fiji_uvd.bin"		#define FIRMWARE_FIJI "amdgpu/fiji_uvd.bin"
	#define FIRMWARE_STONEY "amdgpu/stoney_uvd.bin"		#define FIRMWARE_STONEY "amdgpu/stoney_uvd.bin"
	#define FIRMWARE_ELLESMERE "amdgpu/ellesmere_uvd.bin"		#define FIRMWARE_POLARIS10 "amdgpu/polaris10_uvd.bin"
	#define FIRMWARE_BAFFIN "amdgpu/baffin_uvd.bin"		#define FIRMWARE_POLARIS11 "amdgpu/polaris11_uvd.bin"

	/**		/**
	* amdgpu_uvd_cs_ctx - Command submission parser context		* amdgpu_uvd_cs_ctx - Command submission parser context
	@@ -87,8 +87,8 @@ MODULE_FIRMWARE(FIRMWARE_TONGA);
	MODULE_FIRMWARE(FIRMWARE_CARRIZO);		MODULE_FIRMWARE(FIRMWARE_CARRIZO);
	MODULE_FIRMWARE(FIRMWARE_FIJI);		MODULE_FIRMWARE(FIRMWARE_FIJI);
	MODULE_FIRMWARE(FIRMWARE_STONEY);		MODULE_FIRMWARE(FIRMWARE_STONEY);
	MODULE_FIRMWARE(FIRMWARE_ELLESMERE);		MODULE_FIRMWARE(FIRMWARE_POLARIS10);
	MODULE_FIRMWARE(FIRMWARE_BAFFIN);		MODULE_FIRMWARE(FIRMWARE_POLARIS11);

	static void amdgpu_uvd_note_usage(struct amdgpu_device *adev);		static void amdgpu_uvd_note_usage(struct amdgpu_device *adev);
	static void amdgpu_uvd_idle_work_handler(struct work_struct *work);		static void amdgpu_uvd_idle_work_handler(struct work_struct *work);
	@@ -135,11 +135,11 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
	case CHIP_STONEY:		case CHIP_STONEY:
	fw_name = FIRMWARE_STONEY;		fw_name = FIRMWARE_STONEY;
	break;		break;
	case CHIP_ELLESMERE:		case CHIP_POLARIS10:
	fw_name = FIRMWARE_ELLESMERE;		fw_name = FIRMWARE_POLARIS10;
	break;		break;
	case CHIP_BAFFIN:		case CHIP_POLARIS11:
	fw_name = FIRMWARE_BAFFIN;		fw_name = FIRMWARE_POLARIS11;
	break;		break;
	default:		default:
	return -EINVAL;		return -EINVAL;

Original line number	Original line	Diff line number	Diff line
	@@ -277,16 +277,16 @@ static const struct pci_device_id pciidlist[] = {
	{0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO\|AMD_IS_APU},		{0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO\|AMD_IS_APU},
	/* stoney */		/* stoney */
	{0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY\|AMD_IS_APU},		{0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY\|AMD_IS_APU},
	/* Baffin */		/* Polaris11 */
	{0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	{0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	{0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	{0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	{0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	{0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BAFFIN},		{0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
	/* Ellesmere */		/* Polaris10 */
	{0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ELLESMERE},		{0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
	{0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ELLESMERE},		{0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},

	{0, 0, 0}		{0, 0, 0}
	};		};