pwm: rockchip: Add support for atomic update (2bf1c98a) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/pwm/pwm-rockchip.c

+43 −41

Original line number	Original line	Diff line number	Diff line
	@@ -47,10 +47,12 @@ struct rockchip_pwm_regs {
	struct rockchip_pwm_data {		struct rockchip_pwm_data {
	struct rockchip_pwm_regs regs;		struct rockchip_pwm_regs regs;
	unsigned int prescaler;		unsigned int prescaler;
			bool supports_polarity;
	const struct pwm_ops *ops;		const struct pwm_ops *ops;

	void (set_enable)(struct pwm_chip chip,		void (set_enable)(struct pwm_chip chip,
	struct pwm_device *pwm, bool enable);		struct pwm_device *pwm, bool enable,
			enum pwm_polarity polarity);
	void (get_state)(struct pwm_chip chip, struct pwm_device *pwm,		void (get_state)(struct pwm_chip chip, struct pwm_device *pwm,
	struct pwm_state *state);		struct pwm_state *state);
	};		};
	@@ -61,7 +63,8 @@ static inline struct rockchip_pwm_chip to_rockchip_pwm_chip(struct pwm_chip c)
	}		}

	static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,		static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
	struct pwm_device *pwm, bool enable)		struct pwm_device *pwm, bool enable,
			enum pwm_polarity polarity)
	{		{
	struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);		struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
	u32 enable_conf = PWM_CTRL_OUTPUT_EN \| PWM_CTRL_TIMER_EN;		u32 enable_conf = PWM_CTRL_OUTPUT_EN \| PWM_CTRL_TIMER_EN;
	@@ -91,14 +94,15 @@ static void rockchip_pwm_get_state_v1(struct pwm_chip *chip,
	}		}

	static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,		static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
	struct pwm_device *pwm, bool enable)		struct pwm_device *pwm, bool enable,
			enum pwm_polarity polarity)
	{		{
	struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);		struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
	u32 enable_conf = PWM_OUTPUT_LEFT \| PWM_LP_DISABLE \| PWM_ENABLE \|		u32 enable_conf = PWM_OUTPUT_LEFT \| PWM_LP_DISABLE \| PWM_ENABLE \|
	PWM_CONTINUOUS;		PWM_CONTINUOUS;
	u32 val;		u32 val;

	if (pwm_get_polarity(pwm) == PWM_POLARITY_INVERSED)		if (polarity == PWM_POLARITY_INVERSED)
	enable_conf \|= PWM_DUTY_NEGATIVE \| PWM_INACTIVE_POSITIVE;		enable_conf \|= PWM_DUTY_NEGATIVE \| PWM_INACTIVE_POSITIVE;
	else		else
	enable_conf \|= PWM_DUTY_POSITIVE \| PWM_INACTIVE_NEGATIVE;		enable_conf \|= PWM_DUTY_POSITIVE \| PWM_INACTIVE_NEGATIVE;
	@@ -166,7 +170,6 @@ static int rockchip_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);		struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
	unsigned long period, duty;		unsigned long period, duty;
	u64 clk_rate, div;		u64 clk_rate, div;
	int ret;

	clk_rate = clk_get_rate(pc->clk);		clk_rate = clk_get_rate(pc->clk);

	@@ -182,69 +185,66 @@ static int rockchip_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	div = clk_rate * duty_ns;		div = clk_rate * duty_ns;
	duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC);		duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC);

	ret = clk_enable(pc->clk);
	if (ret)
	return ret;

	writel(period, pc->base + pc->data->regs.period);		writel(period, pc->base + pc->data->regs.period);
	writel(duty, pc->base + pc->data->regs.duty);		writel(duty, pc->base + pc->data->regs.duty);
	writel(0, pc->base + pc->data->regs.cntr);

	clk_disable(pc->clk);

	return 0;		return 0;
	}		}

	static int rockchip_pwm_set_polarity(struct pwm_chip *chip,		static int rockchip_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
	struct pwm_device *pwm,		struct pwm_state *state)
	enum pwm_polarity polarity)
	{
	/*
	* No action needed here because pwm->polarity will be set by the core
	* and the core will only change polarity when the PWM is not enabled.
	* We'll handle things in set_enable().
	*/

	return 0;
	}

	static int rockchip_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	{		{
	struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);		struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
			struct pwm_state curstate;
			bool enabled;
	int ret;		int ret;

			pwm_get_state(pwm, &curstate);
			enabled = curstate.enabled;

	ret = clk_enable(pc->clk);		ret = clk_enable(pc->clk);
	if (ret)		if (ret)
	return ret;		return ret;

	pc->data->set_enable(chip, pwm, true);		if (state->polarity != curstate.polarity && enabled) {
			pc->data->set_enable(chip, pwm, false, state->polarity);
			enabled = false;
			}

	return 0;		ret = rockchip_pwm_config(chip, pwm, state->duty_cycle, state->period);
			if (ret) {
			if (enabled != curstate.enabled)
			pc->data->set_enable(chip, pwm, !enabled,
			state->polarity);

			goto out;
	}		}

	static void rockchip_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)		if (state->enabled != enabled)
	{		pc->data->set_enable(chip, pwm, state->enabled,
	struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);		state->polarity);

	pc->data->set_enable(chip, pwm, false);		/*
			* Update the state with the real hardware, which can differ a bit
			* because of period/duty_cycle approximation.
			*/
			rockchip_pwm_get_state(chip, pwm, state);

			out:
	clk_disable(pc->clk);		clk_disable(pc->clk);

			return ret;
	}		}

	static const struct pwm_ops rockchip_pwm_ops_v1 = {		static const struct pwm_ops rockchip_pwm_ops_v1 = {
	.get_state = rockchip_pwm_get_state,		.get_state = rockchip_pwm_get_state,
	.config = rockchip_pwm_config,		.apply = rockchip_pwm_apply,
	.enable = rockchip_pwm_enable,
	.disable = rockchip_pwm_disable,
	.owner = THIS_MODULE,		.owner = THIS_MODULE,
	};		};

	static const struct pwm_ops rockchip_pwm_ops_v2 = {		static const struct pwm_ops rockchip_pwm_ops_v2 = {
	.get_state = rockchip_pwm_get_state,		.get_state = rockchip_pwm_get_state,
	.config = rockchip_pwm_config,		.apply = rockchip_pwm_apply,
	.set_polarity = rockchip_pwm_set_polarity,
	.enable = rockchip_pwm_enable,
	.disable = rockchip_pwm_disable,
	.owner = THIS_MODULE,		.owner = THIS_MODULE,
	};		};

	@@ -269,6 +269,7 @@ static const struct rockchip_pwm_data pwm_data_v2 = {
	.ctrl = 0x0c,		.ctrl = 0x0c,
	},		},
	.prescaler = 1,		.prescaler = 1,
			.supports_polarity = true,
	.ops = &rockchip_pwm_ops_v2,		.ops = &rockchip_pwm_ops_v2,
	.set_enable = rockchip_pwm_set_enable_v2,		.set_enable = rockchip_pwm_set_enable_v2,
	.get_state = rockchip_pwm_get_state_v2,		.get_state = rockchip_pwm_get_state_v2,
	@@ -282,6 +283,7 @@ static const struct rockchip_pwm_data pwm_data_vop = {
	.ctrl = 0x00,		.ctrl = 0x00,
	},		},
	.prescaler = 1,		.prescaler = 1,
			.supports_polarity = true,
	.ops = &rockchip_pwm_ops_v2,		.ops = &rockchip_pwm_ops_v2,
	.set_enable = rockchip_pwm_set_enable_v2,		.set_enable = rockchip_pwm_set_enable_v2,
	.get_state = rockchip_pwm_get_state_v2,		.get_state = rockchip_pwm_get_state_v2,
	@@ -331,7 +333,7 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
	pc->chip.base = -1;		pc->chip.base = -1;
	pc->chip.npwm = 1;		pc->chip.npwm = 1;

	if (pc->data->ops->set_polarity) {		if (pc->data->supports_polarity) {
	pc->chip.of_xlate = of_pwm_xlate_with_flags;		pc->chip.of_xlate = of_pwm_xlate_with_flags;
	pc->chip.of_pwm_n_cells = 3;		pc->chip.of_pwm_n_cells = 3;
	}		}