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Commit 2b9451a0 authored by Raghavendra Kakarla's avatar Raghavendra Kakarla Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add MPM interrupt controller for msm8937 



Add mpm interrupt controller as SOC interrupt parent and
as a child domain under intc for msm8937.

Change-Id: I7c04fdd93a6e3c972fdc3b13bac4ff4c48dc2aad
Signed-off-by: default avatarRaghavendra Kakarla <rkakarla@codeaurora.org>
parent 695fa64a

arch/arm64/boot/dts/qcom/msm8937.dtsi

+21 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
	model = "Qualcomm Technologies, Inc. MSM8937";

	compatible = "qcom,msm8937";

	qcom,msm-id = <294 0x0>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&wakegic>;



	chosen {

		bootargs = "sched_enable_hmp=1";
@@ -175,11 +175,31 @@ 
	intc: interrupt-controller@b000000 {

		compatible = "qcom,msm-qgic2";

		interrupt-controller;

		interrupt-parent = <&intc>;

		#interrupt-cells = <3>;

		reg = <0x0b000000 0x1000>,

		      <0x0b002000 0x1000>;

	};



	wakegic: wake-gic {

		compatible = "qcom,mpm-gic-msm8937", "qcom,mpm-gic";

		interrupts = <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>;

		reg = <0x601d0 0x1000>,

			<0xb011008 0x4>;  /* MSM_APCS_GCC_BASE 4K */

		reg-names = "vmpm", "ipc";

		qcom,num-mpm-irqs = <96>;

		interrupt-controller;

		interrupt-parent = <&intc>;

		#interrupt-cells = <3>;

	};



	wakegpio: wake-gpio {

		compatible = "qcom,mpm-gpio-msm8937", "qcom,mpm-gpio";

		interrupt-controller;

		interrupt-parent = <&tlmm>;

		#interrupt-cells = <2>;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 2 0xff08>,