Loading drivers/platform/msm/mhi_dev/mhi.h +5 −213 Original line number Original line Diff line number Diff line Loading @@ -14,9 +14,8 @@ #define __MHI_H #define __MHI_H #include <linux/msm_ep_pcie.h> #include <linux/msm_ep_pcie.h> #include <linux/types.h> #include <linux/ipc_logging.h> #include <linux/ipc_logging.h> #include <linux/dma-mapping.h> #include <linux/msm_mhi_dev.h> /** /** * MHI control data structures alloted by the host, including * MHI control data structures alloted by the host, including Loading Loading @@ -276,8 +275,6 @@ struct mhi_config { #define MHI_MASK_ROWS_CH_EV_DB 4 #define MHI_MASK_ROWS_CH_EV_DB 4 #define TRB_MAX_DATA_SIZE 8192 #define TRB_MAX_DATA_SIZE 8192 #define MHI_CTRL_STATE 100 #define MHI_CTRL_STATE 100 #define IPA_DMA_SYNC 1 #define IPA_DMA_ASYNC 0 /*maximum trasnfer completion events buffer*/ /*maximum trasnfer completion events buffer*/ #define MAX_TR_EVENTS 50 #define MAX_TR_EVENTS 50 Loading Loading @@ -360,13 +357,6 @@ enum mhi_dev_ch_operation { MHI_DEV_POLL, MHI_DEV_POLL, }; }; enum mhi_ctrl_info { MHI_STATE_CONFIGURED = 0, MHI_STATE_CONNECTED = 1, MHI_STATE_DISCONNECTED = 2, MHI_STATE_INVAL, }; enum mhi_dev_tr_compl_evt_type { enum mhi_dev_tr_compl_evt_type { SEND_EVENT_BUFFER, SEND_EVENT_BUFFER, SEND_EVENT_RD_OFFSET, SEND_EVENT_RD_OFFSET, Loading Loading @@ -420,38 +410,6 @@ static inline void mhi_dev_ring_inc_index(struct mhi_dev_ring *ring, #define MHI_DEV_MMIO_RANGE 0xc80 #define MHI_DEV_MMIO_RANGE 0xc80 enum cb_reason { MHI_DEV_TRE_AVAILABLE = 0, MHI_DEV_CTRL_UPDATE, }; struct mhi_dev_client_cb_reason { uint32_t ch_id; enum cb_reason reason; }; struct mhi_dev_client { struct list_head list; struct mhi_dev_channel *channel; void (*event_trigger)(struct mhi_dev_client_cb_reason *cb); /* mhi_dev calls are fully synchronous -- only one call may be * active per client at a time for now. */ struct mutex write_lock; wait_queue_head_t wait; /* trace logs */ spinlock_t tr_lock; unsigned int tr_head; unsigned int tr_tail; struct mhi_dev_trace *tr_log; /* client buffers */ struct mhi_dev_iov *iov; uint32_t nr_iov; }; struct ring_cache_req { struct ring_cache_req { struct completion *done; struct completion *done; void *context; void *context; Loading Loading @@ -612,29 +570,12 @@ struct mhi_dev { /*Register for interrupt*/ /*Register for interrupt*/ bool mhi_int; bool mhi_int; bool mhi_int_en; bool mhi_int_en; /* Registered client callback list */ /* Registered client callback list */ struct list_head client_cb_list; struct list_head client_cb_list; struct kobj_uevent_env kobj_env; struct kobj_uevent_env kobj_env; }; }; struct mhi_req { u32 chan; u32 mode; u32 chain; void *buf; dma_addr_t dma; u32 snd_cmpl; void *context; size_t len; size_t actual_len; uint32_t rd_offset; struct mhi_dev_client *client; struct list_head list; union mhi_dev_ring_element_type *el; void (*client_cb)(void *req); }; enum mhi_msg_level { enum mhi_msg_level { MHI_MSG_VERBOSE = 0x0, MHI_MSG_VERBOSE = 0x0, Loading @@ -660,70 +601,8 @@ extern void *mhi_ipc_log; } \ } \ } while (0) } while (0) /* SW channel client list */ enum mhi_client_channel { MHI_CLIENT_LOOPBACK_OUT = 0, MHI_CLIENT_LOOPBACK_IN = 1, MHI_CLIENT_SAHARA_OUT = 2, MHI_CLIENT_SAHARA_IN = 3, MHI_CLIENT_DIAG_OUT = 4, MHI_CLIENT_DIAG_IN = 5, MHI_CLIENT_SSR_OUT = 6, MHI_CLIENT_SSR_IN = 7, MHI_CLIENT_QDSS_OUT = 8, MHI_CLIENT_QDSS_IN = 9, MHI_CLIENT_EFS_OUT = 10, MHI_CLIENT_EFS_IN = 11, MHI_CLIENT_MBIM_OUT = 12, MHI_CLIENT_MBIM_IN = 13, MHI_CLIENT_QMI_OUT = 14, MHI_CLIENT_QMI_IN = 15, MHI_CLIENT_IP_CTRL_0_OUT = 16, MHI_CLIENT_IP_CTRL_0_IN = 17, MHI_CLIENT_IP_CTRL_1_OUT = 18, MHI_CLIENT_IP_CTRL_1_IN = 19, MHI_CLIENT_DCI_OUT = 20, MHI_CLIENT_DCI_IN = 21, MHI_CLIENT_IP_CTRL_3_OUT = 22, MHI_CLIENT_IP_CTRL_3_IN = 23, MHI_CLIENT_IP_CTRL_4_OUT = 24, MHI_CLIENT_IP_CTRL_4_IN = 25, MHI_CLIENT_IP_CTRL_5_OUT = 26, MHI_CLIENT_IP_CTRL_5_IN = 27, MHI_CLIENT_IP_CTRL_6_OUT = 28, MHI_CLIENT_IP_CTRL_6_IN = 29, MHI_CLIENT_IP_CTRL_7_OUT = 30, MHI_CLIENT_IP_CTRL_7_IN = 31, MHI_CLIENT_DUN_OUT = 32, MHI_CLIENT_DUN_IN = 33, MHI_CLIENT_IP_SW_0_OUT = 34, MHI_CLIENT_IP_SW_0_IN = 35, MHI_CLIENT_ADB_OUT = 36, MHI_CLIENT_ADB_IN = 37, MHI_CLIENT_IP_SW_2_OUT = 38, MHI_CLIENT_IP_SW_2_IN = 39, MHI_CLIENT_IP_SW_3_OUT = 40, MHI_CLIENT_IP_SW_3_IN = 41, MHI_CLIENT_CSVT_OUT = 42, MHI_CLIENT_CSVT_IN = 43, MHI_CLIENT_SMCT_OUT = 44, MHI_CLIENT_SMCT_IN = 45, MHI_CLIENT_IP_SW_4_OUT = 46, MHI_CLIENT_IP_SW_4_IN = 47, MHI_MAX_SOFTWARE_CHANNELS, MHI_CLIENT_TEST_OUT = 60, MHI_CLIENT_TEST_IN = 61, MHI_CLIENT_RESERVED_1_LOWER = 62, MHI_CLIENT_RESERVED_1_UPPER = 99, MHI_CLIENT_IP_HW_0_OUT = 100, MHI_CLIENT_IP_HW_0_IN = 101, MHI_CLIENT_RESERVED_2_LOWER = 102, MHI_CLIENT_RESERVED_2_UPPER = 127, MHI_MAX_CHANNELS = 102, MHI_CLIENT_INVALID = 0xFFFFFFFF }; /* Use ID 0 for legacy /dev/mhi_ctrl. Channel 0 is used for internal only */ /* Use ID 0 for legacy /dev/mhi_ctrl. Channel 0 used for internal only */ #define MHI_DEV_UEVENT_CTRL 0 #define MHI_DEV_UEVENT_CTRL 0 struct mhi_dev_uevent_info { struct mhi_dev_uevent_info { Loading @@ -736,58 +615,6 @@ struct mhi_dev_iov { uint32_t buf_size; uint32_t buf_size; }; }; struct mhi_dev_client_cb_data { void *user_data; enum mhi_client_channel channel; enum mhi_ctrl_info ctrl_info; }; typedef void (*mhi_state_cb)(struct mhi_dev_client_cb_data *cb_dat); struct mhi_dev_ready_cb_info { struct list_head list; mhi_state_cb cb; struct mhi_dev_client_cb_data cb_data; }; /** * mhi_dev_open_channel() - Channel open for a given client done prior * to read/write. * @chan_id: Software Channel ID for the assigned client. * @handle_client: Structure device for client handle. * @notifier: Client issued callback notification. */ int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)); /** * mhi_dev_close_channel() - Channel close for a given client. */ int mhi_dev_close_channel(struct mhi_dev_client *handle_client); /** * mhi_dev_read_channel() - Channel read for a given client * @mreq: mreq is the client argument which includes meta info * like write data location, buffer len, read offset, mode, * chain and client call back function which will be invoked * when data read is completed. */ int mhi_dev_read_channel(struct mhi_req *mreq); /** * mhi_dev_write_channel() - Channel write for a given software client. * @wreq wreq is the client argument which includes meta info like * client handle, read data location, buffer length, mode, * and client call back function which will free the packet. * when data write is completed. */ int mhi_dev_write_channel(struct mhi_req *wreq); /** * mhi_dev_channel_isempty() - Checks if there is any pending TRE's to process. * @handle_client: Client Handle issued during mhi_dev_open_channel */ int mhi_dev_channel_isempty(struct mhi_dev_client *handle); struct mhi_dev_trace { struct mhi_dev_trace { unsigned int timestamp; unsigned int timestamp; Loading Loading @@ -1256,43 +1083,8 @@ int mhi_uci_init(void); */ */ int mhi_dev_net_interface_init(void); int mhi_dev_net_interface_init(void); /** * mhi_dev_net_exit() - Clean up and close MHI Network interface module. */ void mhi_dev_net_exit(void); /** * mhi_dev_notify_a7_event() - Used by PCIe driver to notify A7 MHI device * interrupt after doorbell is received. Used by PCIe driver when MHI * A7 interrupts are routed to PCIe instead of MHI device. */ void mhi_dev_notify_a7_event(struct mhi_dev *mhi); void mhi_dev_notify_a7_event(struct mhi_dev *mhi); /** * mhi_ctrl_state_info() - Provide MHI state info * @idx: Channel number idx. Look at channel_state_info and * pass the index for the corresponding channel. * @info: Return the control info. * MHI_STATE=CONFIGURED - MHI device is present but not ready * for data traffic. * MHI_STATE=CONNECTED - MHI device is ready for data transfer. * MHI_STATE=DISCONNECTED - MHI device has its pipes suspended. * exposes device nodes for the supported MHI software * channels. */ int mhi_ctrl_state_info(uint32_t idx, uint32_t *info); /** * uci_ctrl_update() - Update UCI once TRE's are available for clients to * consume. */ void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason); void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason); /** #endif /* _MHI_H */ * mhi_register_state_cb() - Clients can register and receive callback after * MHI channel is connected or disconnected. */ int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel); #endif /* _MHI_H_ */ drivers/platform/msm/mhi_dev/mhi_sm.h +1 −1 Original line number Original line Diff line number Diff line /* Copyright (c) 2015,2017-2018 The Linux Foundation. All rights reserved. /* Copyright (c) 2015,2017-2018, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and Loading include/linux/msm_mhi_dev.h 0 → 100644 +259 −0 Original line number Original line Diff line number Diff line /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __MSM_MHI_DEV_H #define __MSM_MHI_DEV_H #include <linux/types.h> #include <linux/dma-mapping.h> #define IPA_DMA_SYNC 1 #define IPA_DMA_ASYNC 0 enum cb_reason { MHI_DEV_TRE_AVAILABLE = 0, MHI_DEV_CTRL_UPDATE, }; struct mhi_dev_client_cb_reason { uint32_t ch_id; enum cb_reason reason; }; struct mhi_dev_client { struct list_head list; struct mhi_dev_channel *channel; void (*event_trigger)(struct mhi_dev_client_cb_reason *cb); /* mhi_dev calls are fully synchronous -- only one call may be * active per client at a time for now. */ struct mutex write_lock; wait_queue_head_t wait; /* trace logs */ spinlock_t tr_lock; unsigned int tr_head; unsigned int tr_tail; struct mhi_dev_trace *tr_log; /* client buffers */ struct mhi_dev_iov *iov; uint32_t nr_iov; }; enum mhi_ctrl_info { MHI_STATE_CONFIGURED = 0, MHI_STATE_CONNECTED = 1, MHI_STATE_DISCONNECTED = 2, MHI_STATE_INVAL, }; struct mhi_req { u32 chan; u32 mode; u32 chain; void *buf; dma_addr_t dma; u32 snd_cmpl; void *context; size_t len; size_t actual_len; uint32_t rd_offset; struct mhi_dev_client *client; struct list_head list; union mhi_dev_ring_element_type *el; void (*client_cb)(void *req); }; /* SW channel client list */ enum mhi_client_channel { MHI_CLIENT_LOOPBACK_OUT = 0, MHI_CLIENT_LOOPBACK_IN = 1, MHI_CLIENT_SAHARA_OUT = 2, MHI_CLIENT_SAHARA_IN = 3, MHI_CLIENT_DIAG_OUT = 4, MHI_CLIENT_DIAG_IN = 5, MHI_CLIENT_SSR_OUT = 6, MHI_CLIENT_SSR_IN = 7, MHI_CLIENT_QDSS_OUT = 8, MHI_CLIENT_QDSS_IN = 9, MHI_CLIENT_EFS_OUT = 10, MHI_CLIENT_EFS_IN = 11, MHI_CLIENT_MBIM_OUT = 12, MHI_CLIENT_MBIM_IN = 13, MHI_CLIENT_QMI_OUT = 14, MHI_CLIENT_QMI_IN = 15, MHI_CLIENT_IP_CTRL_0_OUT = 16, MHI_CLIENT_IP_CTRL_0_IN = 17, MHI_CLIENT_IP_CTRL_1_OUT = 18, MHI_CLIENT_IP_CTRL_1_IN = 19, MHI_CLIENT_DCI_OUT = 20, MHI_CLIENT_DCI_IN = 21, MHI_CLIENT_IP_CTRL_3_OUT = 22, MHI_CLIENT_IP_CTRL_3_IN = 23, MHI_CLIENT_IP_CTRL_4_OUT = 24, MHI_CLIENT_IP_CTRL_4_IN = 25, MHI_CLIENT_IP_CTRL_5_OUT = 26, MHI_CLIENT_IP_CTRL_5_IN = 27, MHI_CLIENT_IP_CTRL_6_OUT = 28, MHI_CLIENT_IP_CTRL_6_IN = 29, MHI_CLIENT_IP_CTRL_7_OUT = 30, MHI_CLIENT_IP_CTRL_7_IN = 31, MHI_CLIENT_DUN_OUT = 32, MHI_CLIENT_DUN_IN = 33, MHI_CLIENT_IP_SW_0_OUT = 34, MHI_CLIENT_IP_SW_0_IN = 35, MHI_CLIENT_ADB_OUT = 36, MHI_CLIENT_ADB_IN = 37, MHI_CLIENT_IP_SW_2_OUT = 38, MHI_CLIENT_IP_SW_2_IN = 39, MHI_CLIENT_IP_SW_3_OUT = 40, MHI_CLIENT_IP_SW_3_IN = 41, MHI_CLIENT_CSVT_OUT = 42, MHI_CLIENT_CSVT_IN = 43, MHI_CLIENT_SMCT_OUT = 44, MHI_CLIENT_SMCT_IN = 45, MHI_CLIENT_IP_SW_4_OUT = 46, MHI_CLIENT_IP_SW_4_IN = 47, MHI_MAX_SOFTWARE_CHANNELS, MHI_CLIENT_TEST_OUT = 60, MHI_CLIENT_TEST_IN = 61, MHI_CLIENT_RESERVED_1_LOWER = 62, MHI_CLIENT_RESERVED_1_UPPER = 99, MHI_CLIENT_IP_HW_0_OUT = 100, MHI_CLIENT_IP_HW_0_IN = 101, MHI_CLIENT_RESERVED_2_LOWER = 102, MHI_CLIENT_RESERVED_2_UPPER = 127, MHI_MAX_CHANNELS = 102, MHI_CLIENT_INVALID = 0xFFFFFFFF }; struct mhi_dev_client_cb_data { void *user_data; enum mhi_client_channel channel; enum mhi_ctrl_info ctrl_info; }; typedef void (*mhi_state_cb)(struct mhi_dev_client_cb_data *cb_dat); struct mhi_dev_ready_cb_info { struct list_head list; mhi_state_cb cb; struct mhi_dev_client_cb_data cb_data; }; #if defined(CONFIG_MSM_MHI_DEV) /** * mhi_dev_open_channel() - Channel open for a given client done prior * to read/write. * @chan_id: Software Channel ID for the assigned client. * @handle_client: Structure device for client handle. * @notifier: Client issued callback notification. */ int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)); /** * mhi_dev_close_channel() - Channel close for a given client. */ int mhi_dev_close_channel(struct mhi_dev_client *handle_client); /** * mhi_dev_read_channel() - Channel read for a given client * @mreq: mreq is the client argument which includes meta info * like write data location, buffer len, read offset, mode, * chain and client call back function which will be invoked * when data read is completed. */ int mhi_dev_read_channel(struct mhi_req *mreq); /** * mhi_dev_write_channel() - Channel write for a given software client. * @wreq wreq is the client argument which includes meta info like * client handle, read data location, buffer length, mode, * and client call back function which will free the packet. * when data write is completed. */ int mhi_dev_write_channel(struct mhi_req *wreq); /** * mhi_dev_channel_isempty() - Checks if there is any pending TRE's to process. * @handle_client: Client Handle issued during mhi_dev_open_channel */ int mhi_dev_channel_isempty(struct mhi_dev_client *handle); /** * mhi_ctrl_state_info() - Provide MHI state info * @idx: Channel number idx. Look at channel_state_info and * pass the index for the corresponding channel. * @info: Return the control info. * MHI_STATE=CONFIGURED - MHI device is present but not ready * for data traffic. * MHI_STATE=CONNECTED - MHI device is ready for data transfer. * MHI_STATE=DISCONNECTED - MHI device has its pipes suspended. * exposes device nodes for the supported MHI software * channels. */ int mhi_ctrl_state_info(uint32_t idx, uint32_t *info); /** * mhi_register_state_cb() - Clients can register and receive callback after * MHI channel is connected or disconnected. */ int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel); #else static inline int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)) { return -EINVAL; }; static inline int mhi_dev_close_channel(struct mhi_dev_client *handle_client) { return -EINVAL; }; static inline int mhi_dev_read_channel(struct mhi_req *mreq) { return -EINVAL; }; static inline int mhi_dev_write_channel(struct mhi_req *wreq) { return -EINVAL; }; static inline int mhi_dev_channel_isempty(struct mhi_dev_client *handle) { return -EINVAL; }; static inline int mhi_ctrl_state_info(uint32_t idx, uint32_t *info) { return -EINVAL; }; static inline int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel) { return -EINVAL; }; #endif #endif /* _MSM_MHI_DEV_H*/ Loading
drivers/platform/msm/mhi_dev/mhi.h +5 −213 Original line number Original line Diff line number Diff line Loading @@ -14,9 +14,8 @@ #define __MHI_H #define __MHI_H #include <linux/msm_ep_pcie.h> #include <linux/msm_ep_pcie.h> #include <linux/types.h> #include <linux/ipc_logging.h> #include <linux/ipc_logging.h> #include <linux/dma-mapping.h> #include <linux/msm_mhi_dev.h> /** /** * MHI control data structures alloted by the host, including * MHI control data structures alloted by the host, including Loading Loading @@ -276,8 +275,6 @@ struct mhi_config { #define MHI_MASK_ROWS_CH_EV_DB 4 #define MHI_MASK_ROWS_CH_EV_DB 4 #define TRB_MAX_DATA_SIZE 8192 #define TRB_MAX_DATA_SIZE 8192 #define MHI_CTRL_STATE 100 #define MHI_CTRL_STATE 100 #define IPA_DMA_SYNC 1 #define IPA_DMA_ASYNC 0 /*maximum trasnfer completion events buffer*/ /*maximum trasnfer completion events buffer*/ #define MAX_TR_EVENTS 50 #define MAX_TR_EVENTS 50 Loading Loading @@ -360,13 +357,6 @@ enum mhi_dev_ch_operation { MHI_DEV_POLL, MHI_DEV_POLL, }; }; enum mhi_ctrl_info { MHI_STATE_CONFIGURED = 0, MHI_STATE_CONNECTED = 1, MHI_STATE_DISCONNECTED = 2, MHI_STATE_INVAL, }; enum mhi_dev_tr_compl_evt_type { enum mhi_dev_tr_compl_evt_type { SEND_EVENT_BUFFER, SEND_EVENT_BUFFER, SEND_EVENT_RD_OFFSET, SEND_EVENT_RD_OFFSET, Loading Loading @@ -420,38 +410,6 @@ static inline void mhi_dev_ring_inc_index(struct mhi_dev_ring *ring, #define MHI_DEV_MMIO_RANGE 0xc80 #define MHI_DEV_MMIO_RANGE 0xc80 enum cb_reason { MHI_DEV_TRE_AVAILABLE = 0, MHI_DEV_CTRL_UPDATE, }; struct mhi_dev_client_cb_reason { uint32_t ch_id; enum cb_reason reason; }; struct mhi_dev_client { struct list_head list; struct mhi_dev_channel *channel; void (*event_trigger)(struct mhi_dev_client_cb_reason *cb); /* mhi_dev calls are fully synchronous -- only one call may be * active per client at a time for now. */ struct mutex write_lock; wait_queue_head_t wait; /* trace logs */ spinlock_t tr_lock; unsigned int tr_head; unsigned int tr_tail; struct mhi_dev_trace *tr_log; /* client buffers */ struct mhi_dev_iov *iov; uint32_t nr_iov; }; struct ring_cache_req { struct ring_cache_req { struct completion *done; struct completion *done; void *context; void *context; Loading Loading @@ -612,29 +570,12 @@ struct mhi_dev { /*Register for interrupt*/ /*Register for interrupt*/ bool mhi_int; bool mhi_int; bool mhi_int_en; bool mhi_int_en; /* Registered client callback list */ /* Registered client callback list */ struct list_head client_cb_list; struct list_head client_cb_list; struct kobj_uevent_env kobj_env; struct kobj_uevent_env kobj_env; }; }; struct mhi_req { u32 chan; u32 mode; u32 chain; void *buf; dma_addr_t dma; u32 snd_cmpl; void *context; size_t len; size_t actual_len; uint32_t rd_offset; struct mhi_dev_client *client; struct list_head list; union mhi_dev_ring_element_type *el; void (*client_cb)(void *req); }; enum mhi_msg_level { enum mhi_msg_level { MHI_MSG_VERBOSE = 0x0, MHI_MSG_VERBOSE = 0x0, Loading @@ -660,70 +601,8 @@ extern void *mhi_ipc_log; } \ } \ } while (0) } while (0) /* SW channel client list */ enum mhi_client_channel { MHI_CLIENT_LOOPBACK_OUT = 0, MHI_CLIENT_LOOPBACK_IN = 1, MHI_CLIENT_SAHARA_OUT = 2, MHI_CLIENT_SAHARA_IN = 3, MHI_CLIENT_DIAG_OUT = 4, MHI_CLIENT_DIAG_IN = 5, MHI_CLIENT_SSR_OUT = 6, MHI_CLIENT_SSR_IN = 7, MHI_CLIENT_QDSS_OUT = 8, MHI_CLIENT_QDSS_IN = 9, MHI_CLIENT_EFS_OUT = 10, MHI_CLIENT_EFS_IN = 11, MHI_CLIENT_MBIM_OUT = 12, MHI_CLIENT_MBIM_IN = 13, MHI_CLIENT_QMI_OUT = 14, MHI_CLIENT_QMI_IN = 15, MHI_CLIENT_IP_CTRL_0_OUT = 16, MHI_CLIENT_IP_CTRL_0_IN = 17, MHI_CLIENT_IP_CTRL_1_OUT = 18, MHI_CLIENT_IP_CTRL_1_IN = 19, MHI_CLIENT_DCI_OUT = 20, MHI_CLIENT_DCI_IN = 21, MHI_CLIENT_IP_CTRL_3_OUT = 22, MHI_CLIENT_IP_CTRL_3_IN = 23, MHI_CLIENT_IP_CTRL_4_OUT = 24, MHI_CLIENT_IP_CTRL_4_IN = 25, MHI_CLIENT_IP_CTRL_5_OUT = 26, MHI_CLIENT_IP_CTRL_5_IN = 27, MHI_CLIENT_IP_CTRL_6_OUT = 28, MHI_CLIENT_IP_CTRL_6_IN = 29, MHI_CLIENT_IP_CTRL_7_OUT = 30, MHI_CLIENT_IP_CTRL_7_IN = 31, MHI_CLIENT_DUN_OUT = 32, MHI_CLIENT_DUN_IN = 33, MHI_CLIENT_IP_SW_0_OUT = 34, MHI_CLIENT_IP_SW_0_IN = 35, MHI_CLIENT_ADB_OUT = 36, MHI_CLIENT_ADB_IN = 37, MHI_CLIENT_IP_SW_2_OUT = 38, MHI_CLIENT_IP_SW_2_IN = 39, MHI_CLIENT_IP_SW_3_OUT = 40, MHI_CLIENT_IP_SW_3_IN = 41, MHI_CLIENT_CSVT_OUT = 42, MHI_CLIENT_CSVT_IN = 43, MHI_CLIENT_SMCT_OUT = 44, MHI_CLIENT_SMCT_IN = 45, MHI_CLIENT_IP_SW_4_OUT = 46, MHI_CLIENT_IP_SW_4_IN = 47, MHI_MAX_SOFTWARE_CHANNELS, MHI_CLIENT_TEST_OUT = 60, MHI_CLIENT_TEST_IN = 61, MHI_CLIENT_RESERVED_1_LOWER = 62, MHI_CLIENT_RESERVED_1_UPPER = 99, MHI_CLIENT_IP_HW_0_OUT = 100, MHI_CLIENT_IP_HW_0_IN = 101, MHI_CLIENT_RESERVED_2_LOWER = 102, MHI_CLIENT_RESERVED_2_UPPER = 127, MHI_MAX_CHANNELS = 102, MHI_CLIENT_INVALID = 0xFFFFFFFF }; /* Use ID 0 for legacy /dev/mhi_ctrl. Channel 0 is used for internal only */ /* Use ID 0 for legacy /dev/mhi_ctrl. Channel 0 used for internal only */ #define MHI_DEV_UEVENT_CTRL 0 #define MHI_DEV_UEVENT_CTRL 0 struct mhi_dev_uevent_info { struct mhi_dev_uevent_info { Loading @@ -736,58 +615,6 @@ struct mhi_dev_iov { uint32_t buf_size; uint32_t buf_size; }; }; struct mhi_dev_client_cb_data { void *user_data; enum mhi_client_channel channel; enum mhi_ctrl_info ctrl_info; }; typedef void (*mhi_state_cb)(struct mhi_dev_client_cb_data *cb_dat); struct mhi_dev_ready_cb_info { struct list_head list; mhi_state_cb cb; struct mhi_dev_client_cb_data cb_data; }; /** * mhi_dev_open_channel() - Channel open for a given client done prior * to read/write. * @chan_id: Software Channel ID for the assigned client. * @handle_client: Structure device for client handle. * @notifier: Client issued callback notification. */ int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)); /** * mhi_dev_close_channel() - Channel close for a given client. */ int mhi_dev_close_channel(struct mhi_dev_client *handle_client); /** * mhi_dev_read_channel() - Channel read for a given client * @mreq: mreq is the client argument which includes meta info * like write data location, buffer len, read offset, mode, * chain and client call back function which will be invoked * when data read is completed. */ int mhi_dev_read_channel(struct mhi_req *mreq); /** * mhi_dev_write_channel() - Channel write for a given software client. * @wreq wreq is the client argument which includes meta info like * client handle, read data location, buffer length, mode, * and client call back function which will free the packet. * when data write is completed. */ int mhi_dev_write_channel(struct mhi_req *wreq); /** * mhi_dev_channel_isempty() - Checks if there is any pending TRE's to process. * @handle_client: Client Handle issued during mhi_dev_open_channel */ int mhi_dev_channel_isempty(struct mhi_dev_client *handle); struct mhi_dev_trace { struct mhi_dev_trace { unsigned int timestamp; unsigned int timestamp; Loading Loading @@ -1256,43 +1083,8 @@ int mhi_uci_init(void); */ */ int mhi_dev_net_interface_init(void); int mhi_dev_net_interface_init(void); /** * mhi_dev_net_exit() - Clean up and close MHI Network interface module. */ void mhi_dev_net_exit(void); /** * mhi_dev_notify_a7_event() - Used by PCIe driver to notify A7 MHI device * interrupt after doorbell is received. Used by PCIe driver when MHI * A7 interrupts are routed to PCIe instead of MHI device. */ void mhi_dev_notify_a7_event(struct mhi_dev *mhi); void mhi_dev_notify_a7_event(struct mhi_dev *mhi); /** * mhi_ctrl_state_info() - Provide MHI state info * @idx: Channel number idx. Look at channel_state_info and * pass the index for the corresponding channel. * @info: Return the control info. * MHI_STATE=CONFIGURED - MHI device is present but not ready * for data traffic. * MHI_STATE=CONNECTED - MHI device is ready for data transfer. * MHI_STATE=DISCONNECTED - MHI device has its pipes suspended. * exposes device nodes for the supported MHI software * channels. */ int mhi_ctrl_state_info(uint32_t idx, uint32_t *info); /** * uci_ctrl_update() - Update UCI once TRE's are available for clients to * consume. */ void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason); void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason); /** #endif /* _MHI_H */ * mhi_register_state_cb() - Clients can register and receive callback after * MHI channel is connected or disconnected. */ int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel); #endif /* _MHI_H_ */
drivers/platform/msm/mhi_dev/mhi_sm.h +1 −1 Original line number Original line Diff line number Diff line /* Copyright (c) 2015,2017-2018 The Linux Foundation. All rights reserved. /* Copyright (c) 2015,2017-2018, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and Loading
include/linux/msm_mhi_dev.h 0 → 100644 +259 −0 Original line number Original line Diff line number Diff line /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __MSM_MHI_DEV_H #define __MSM_MHI_DEV_H #include <linux/types.h> #include <linux/dma-mapping.h> #define IPA_DMA_SYNC 1 #define IPA_DMA_ASYNC 0 enum cb_reason { MHI_DEV_TRE_AVAILABLE = 0, MHI_DEV_CTRL_UPDATE, }; struct mhi_dev_client_cb_reason { uint32_t ch_id; enum cb_reason reason; }; struct mhi_dev_client { struct list_head list; struct mhi_dev_channel *channel; void (*event_trigger)(struct mhi_dev_client_cb_reason *cb); /* mhi_dev calls are fully synchronous -- only one call may be * active per client at a time for now. */ struct mutex write_lock; wait_queue_head_t wait; /* trace logs */ spinlock_t tr_lock; unsigned int tr_head; unsigned int tr_tail; struct mhi_dev_trace *tr_log; /* client buffers */ struct mhi_dev_iov *iov; uint32_t nr_iov; }; enum mhi_ctrl_info { MHI_STATE_CONFIGURED = 0, MHI_STATE_CONNECTED = 1, MHI_STATE_DISCONNECTED = 2, MHI_STATE_INVAL, }; struct mhi_req { u32 chan; u32 mode; u32 chain; void *buf; dma_addr_t dma; u32 snd_cmpl; void *context; size_t len; size_t actual_len; uint32_t rd_offset; struct mhi_dev_client *client; struct list_head list; union mhi_dev_ring_element_type *el; void (*client_cb)(void *req); }; /* SW channel client list */ enum mhi_client_channel { MHI_CLIENT_LOOPBACK_OUT = 0, MHI_CLIENT_LOOPBACK_IN = 1, MHI_CLIENT_SAHARA_OUT = 2, MHI_CLIENT_SAHARA_IN = 3, MHI_CLIENT_DIAG_OUT = 4, MHI_CLIENT_DIAG_IN = 5, MHI_CLIENT_SSR_OUT = 6, MHI_CLIENT_SSR_IN = 7, MHI_CLIENT_QDSS_OUT = 8, MHI_CLIENT_QDSS_IN = 9, MHI_CLIENT_EFS_OUT = 10, MHI_CLIENT_EFS_IN = 11, MHI_CLIENT_MBIM_OUT = 12, MHI_CLIENT_MBIM_IN = 13, MHI_CLIENT_QMI_OUT = 14, MHI_CLIENT_QMI_IN = 15, MHI_CLIENT_IP_CTRL_0_OUT = 16, MHI_CLIENT_IP_CTRL_0_IN = 17, MHI_CLIENT_IP_CTRL_1_OUT = 18, MHI_CLIENT_IP_CTRL_1_IN = 19, MHI_CLIENT_DCI_OUT = 20, MHI_CLIENT_DCI_IN = 21, MHI_CLIENT_IP_CTRL_3_OUT = 22, MHI_CLIENT_IP_CTRL_3_IN = 23, MHI_CLIENT_IP_CTRL_4_OUT = 24, MHI_CLIENT_IP_CTRL_4_IN = 25, MHI_CLIENT_IP_CTRL_5_OUT = 26, MHI_CLIENT_IP_CTRL_5_IN = 27, MHI_CLIENT_IP_CTRL_6_OUT = 28, MHI_CLIENT_IP_CTRL_6_IN = 29, MHI_CLIENT_IP_CTRL_7_OUT = 30, MHI_CLIENT_IP_CTRL_7_IN = 31, MHI_CLIENT_DUN_OUT = 32, MHI_CLIENT_DUN_IN = 33, MHI_CLIENT_IP_SW_0_OUT = 34, MHI_CLIENT_IP_SW_0_IN = 35, MHI_CLIENT_ADB_OUT = 36, MHI_CLIENT_ADB_IN = 37, MHI_CLIENT_IP_SW_2_OUT = 38, MHI_CLIENT_IP_SW_2_IN = 39, MHI_CLIENT_IP_SW_3_OUT = 40, MHI_CLIENT_IP_SW_3_IN = 41, MHI_CLIENT_CSVT_OUT = 42, MHI_CLIENT_CSVT_IN = 43, MHI_CLIENT_SMCT_OUT = 44, MHI_CLIENT_SMCT_IN = 45, MHI_CLIENT_IP_SW_4_OUT = 46, MHI_CLIENT_IP_SW_4_IN = 47, MHI_MAX_SOFTWARE_CHANNELS, MHI_CLIENT_TEST_OUT = 60, MHI_CLIENT_TEST_IN = 61, MHI_CLIENT_RESERVED_1_LOWER = 62, MHI_CLIENT_RESERVED_1_UPPER = 99, MHI_CLIENT_IP_HW_0_OUT = 100, MHI_CLIENT_IP_HW_0_IN = 101, MHI_CLIENT_RESERVED_2_LOWER = 102, MHI_CLIENT_RESERVED_2_UPPER = 127, MHI_MAX_CHANNELS = 102, MHI_CLIENT_INVALID = 0xFFFFFFFF }; struct mhi_dev_client_cb_data { void *user_data; enum mhi_client_channel channel; enum mhi_ctrl_info ctrl_info; }; typedef void (*mhi_state_cb)(struct mhi_dev_client_cb_data *cb_dat); struct mhi_dev_ready_cb_info { struct list_head list; mhi_state_cb cb; struct mhi_dev_client_cb_data cb_data; }; #if defined(CONFIG_MSM_MHI_DEV) /** * mhi_dev_open_channel() - Channel open for a given client done prior * to read/write. * @chan_id: Software Channel ID for the assigned client. * @handle_client: Structure device for client handle. * @notifier: Client issued callback notification. */ int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)); /** * mhi_dev_close_channel() - Channel close for a given client. */ int mhi_dev_close_channel(struct mhi_dev_client *handle_client); /** * mhi_dev_read_channel() - Channel read for a given client * @mreq: mreq is the client argument which includes meta info * like write data location, buffer len, read offset, mode, * chain and client call back function which will be invoked * when data read is completed. */ int mhi_dev_read_channel(struct mhi_req *mreq); /** * mhi_dev_write_channel() - Channel write for a given software client. * @wreq wreq is the client argument which includes meta info like * client handle, read data location, buffer length, mode, * and client call back function which will free the packet. * when data write is completed. */ int mhi_dev_write_channel(struct mhi_req *wreq); /** * mhi_dev_channel_isempty() - Checks if there is any pending TRE's to process. * @handle_client: Client Handle issued during mhi_dev_open_channel */ int mhi_dev_channel_isempty(struct mhi_dev_client *handle); /** * mhi_ctrl_state_info() - Provide MHI state info * @idx: Channel number idx. Look at channel_state_info and * pass the index for the corresponding channel. * @info: Return the control info. * MHI_STATE=CONFIGURED - MHI device is present but not ready * for data traffic. * MHI_STATE=CONNECTED - MHI device is ready for data transfer. * MHI_STATE=DISCONNECTED - MHI device has its pipes suspended. * exposes device nodes for the supported MHI software * channels. */ int mhi_ctrl_state_info(uint32_t idx, uint32_t *info); /** * mhi_register_state_cb() - Clients can register and receive callback after * MHI channel is connected or disconnected. */ int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel); #else static inline int mhi_dev_open_channel(uint32_t chan_id, struct mhi_dev_client **handle_client, void (*event_trigger)(struct mhi_dev_client_cb_reason *cb)) { return -EINVAL; }; static inline int mhi_dev_close_channel(struct mhi_dev_client *handle_client) { return -EINVAL; }; static inline int mhi_dev_read_channel(struct mhi_req *mreq) { return -EINVAL; }; static inline int mhi_dev_write_channel(struct mhi_req *wreq) { return -EINVAL; }; static inline int mhi_dev_channel_isempty(struct mhi_dev_client *handle) { return -EINVAL; }; static inline int mhi_ctrl_state_info(uint32_t idx, uint32_t *info) { return -EINVAL; }; static inline int mhi_register_state_cb(void (*mhi_state_cb) (struct mhi_dev_client_cb_data *cb_data), void *data, enum mhi_client_channel channel) { return -EINVAL; }; #endif #endif /* _MSM_MHI_DEV_H*/
