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Commit 2a8307aa authored by Sean Wang's avatar Sean Wang Committed by David S. Miller
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net: ethernet: mediatek: add more resets for internal ethernet circuit block 



struct mtk_eth has already contained struct regmap ethsys pointer
to the address range of the internal circuit reset, so we reuse it
to reset more internal blocks on ethernet hardware such as packet
processing engine (PPE) and frame engine (FE) instead of rstc which
deals with FE only.

Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9ea4d311

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+15 −12
Original line number Diff line number Diff line
@@ -1414,6 +1414,19 @@ static int mtk_stop(struct net_device *dev) 
	return 0;

}



static void ethsys_reset(struct mtk_eth *eth, u32 reset_bits)

{

	regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL,

			   reset_bits,

			   reset_bits);



	usleep_range(1000, 1100);

	regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL,

			   reset_bits,

			   ~reset_bits);

	mdelay(10);

}



static int mtk_hw_init(struct mtk_eth *eth)

{

	int i, val;
@@ -1428,12 +1441,8 @@ static int mtk_hw_init(struct mtk_eth *eth) 
	clk_prepare_enable(eth->clks[MTK_CLK_ESW]);

	clk_prepare_enable(eth->clks[MTK_CLK_GP1]);

	clk_prepare_enable(eth->clks[MTK_CLK_GP2]);



	/* reset the frame engine */

	reset_control_assert(eth->rstc);

	usleep_range(10, 20);

	reset_control_deassert(eth->rstc);

	usleep_range(10, 20);

	ethsys_reset(eth, RSTCTRL_FE);

	ethsys_reset(eth, RSTCTRL_PPE);



	regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);

	for (i = 0; i < MTK_MAC_COUNT; i++) {
@@ -1896,12 +1905,6 @@ static int mtk_probe(struct platform_device *pdev) 
		return PTR_ERR(eth->pctl);

	}



	eth->rstc = devm_reset_control_get(&pdev->dev, "eth");

	if (IS_ERR(eth->rstc)) {

		dev_err(&pdev->dev, "no eth reset found\n");

		return PTR_ERR(eth->rstc);

	}



	for (i = 0; i < 3; i++) {

		eth->irq[i] = platform_get_irq(pdev, i);

		if (eth->irq[i] < 0) {

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+5 −1
Original line number Diff line number Diff line
@@ -266,6 +266,11 @@ 
#define SYSCFG0_GE_MASK		0x3

#define SYSCFG0_GE_MODE(x, y)	(x << (12 + (y * 2)))



/*ethernet reset control register*/

#define ETHSYS_RSTCTRL		0x34

#define RSTCTRL_FE		BIT(6)

#define RSTCTRL_PPE		BIT(31)



struct mtk_rx_dma {

	unsigned int rxd1;

	unsigned int rxd2;
@@ -423,7 +428,6 @@ struct mtk_rx_ring { 
struct mtk_eth {

	struct device			*dev;

	void __iomem			*base;

	struct reset_control		*rstc;

	spinlock_t			page_lock;

	spinlock_t			irq_lock;

	struct net_device		dummy_dev;