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Commit 2a6a30e0 authored by Patrick Boettcher's avatar Patrick Boettcher Committed by Mauro Carvalho Chehab
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V4L/DVB (12899): DiB0070: Indenting driver with indent -linux 



In order to follow a little bit the kernel coding style from now on
after the generation of that driver file and indent -linux call is
emitted.

Signed-off-by: default avatarPatrick Boettcher <pboettcher@kernellabs.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 7e5ce651

drivers/media/dvb/frontends/dib0070.c

+391 −377
Original line number Diff line number Diff line
@@ -124,34 +124,34 @@ static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val) 


static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)

{

    struct dib0070_state *st = fe->tuner_priv;

    u16 tmp = dib0070_read_reg(st, 0x02) & 0x3fff;

	struct dib0070_state *state = fe->tuner_priv;

	u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff;



    if (fe->dtv_property_cache.bandwidth_hz/1000 > 7000)

	if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 7000)

		tmp |= (0 << 14);

    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 6000)

	else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 6000)

		tmp |= (1 << 14);

    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 5000)

	else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 5000)

		tmp |= (2 << 14);

	else

		tmp |= (3 << 14);



    dib0070_write_reg(st, 0x02, tmp);

	dib0070_write_reg(state, 0x02, tmp);



	/* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */

    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT) {

	u16 value = dib0070_read_reg(st, 0x17);

	if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) {

		u16 value = dib0070_read_reg(state, 0x17);



	dib0070_write_reg(st, 0x17, value & 0xfffc);

	tmp = dib0070_read_reg(st, 0x01) & 0x01ff;

	dib0070_write_reg(st, 0x01, tmp | (60 << 9));

		dib0070_write_reg(state, 0x17, value & 0xfffc);

		tmp = dib0070_read_reg(state, 0x01) & 0x01ff;

		dib0070_write_reg(state, 0x01, tmp | (60 << 9));



	dib0070_write_reg(st, 0x17, value);

		dib0070_write_reg(state, 0x17, value);

	}

	return 0;

}



static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *tune_state)

static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state *tune_state)

{

	int8_t step_sign;

	u16 adc;
@@ -159,26 +159,26 @@ static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *t 


	if (*tune_state == CT_TUNER_STEP_0) {



		dib0070_write_reg(st, 0x0f, 0xed10);

		dib0070_write_reg(st, 0x17,    0x0034);

		dib0070_write_reg(state, 0x0f, 0xed10);

		dib0070_write_reg(state, 0x17, 0x0034);



		dib0070_write_reg(st, 0x18, 0x0032);

		st->step = st->captrim = st->fcaptrim = 64;

		st->adc_diff = 3000;

		dib0070_write_reg(state, 0x18, 0x0032);

		state->step = state->captrim = state->fcaptrim = 64;

		state->adc_diff = 3000;

		ret = 20;



		*tune_state = CT_TUNER_STEP_1;

	} else if (*tune_state == CT_TUNER_STEP_1) {

		st->step /= 2;

		dib0070_write_reg(st, 0x14, st->lo4 | st->captrim);

		state->step /= 2;

		dib0070_write_reg(state, 0x14, state->lo4 | state->captrim);

		ret = 15;



		*tune_state = CT_TUNER_STEP_2;

	} else if (*tune_state == CT_TUNER_STEP_2) {



		adc = dib0070_read_reg(st, 0x19);

		adc = dib0070_read_reg(state, 0x19);



		dprintk( "CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", st->captrim, adc, (u32) adc*(u32)1800/(u32)1024);

		dprintk("CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", state->captrim, adc, (u32) adc * (u32) 1800 / (u32) 1024);



		if (adc >= 400) {

			adc -= 400;
@@ -188,24 +188,22 @@ static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *t 
			step_sign = 1;

		}



		if (adc < st->adc_diff) {

			dprintk( "CAPTRIM=%hd is closer to target (%hd/%hd)", st->captrim, adc, st->adc_diff);

			st->adc_diff = adc;

			st->fcaptrim = st->captrim;





		if (adc < state->adc_diff) {

			dprintk("CAPTRIM=%hd is closer to target (%hd/%hd)", state->captrim, adc, state->adc_diff);

			state->adc_diff = adc;

			state->fcaptrim = state->captrim;



		}

		st->captrim += (step_sign * st->step);

		state->captrim += (step_sign * state->step);



		if (st->step >= 1)

		if (state->step >= 1)

			*tune_state = CT_TUNER_STEP_1;

		else

			*tune_state = CT_TUNER_STEP_3;



	} else if (*tune_state == CT_TUNER_STEP_3) {

		dib0070_write_reg(st, 0x14, st->lo4 | st->fcaptrim);

		dib0070_write_reg(st, 0x18, 0x07ff);

		dib0070_write_reg(state, 0x14, state->lo4 | state->fcaptrim);

		dib0070_write_reg(state, 0x18, 0x07ff);

		*tune_state = CT_TUNER_STEP_4;

	}
@@ -220,8 +218,25 @@ static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf 
	return dib0070_write_reg(state, 0x15, lo5);

}



struct dib0070_tuning

void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)

{

	struct dib0070_state *state = fe->tuner_priv;



	if (open) {

		dib0070_write_reg(state, 0x1b, 0xff00);

		dib0070_write_reg(state, 0x1a, 0x0000);

	} else {

		dib0070_write_reg(state, 0x1b, 0x4112);

		if (state->cfg->vga_filter != 0) {

			dib0070_write_reg(state, 0x1a, state->cfg->vga_filter);

			dprintk("vga filter register is set to %x", state->cfg->vga_filter);

		} else

			dib0070_write_reg(state, 0x1a, 0x0009);

	}

}



EXPORT_SYMBOL(dib0070_ctrl_agc_filter);

struct dib0070_tuning {

	u32 max_freq;		/* for every frequency less than or equal to that field: this information is correct */

	u8 switch_trim;

	u8 vco_band;
@@ -232,15 +247,12 @@ struct dib0070_tuning 
	u16 tuner_enable;

};



struct dib0070_lna_match

{

struct dib0070_lna_match {

	u32 max_freq;		/* for every frequency less than or equal to that field: this information is correct */

	u8 lna_band;

};



static const struct dib0070_tuning dib0070s_tuning_table[] =



{

static const struct dib0070_tuning dib0070s_tuning_table[] = {

	{570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800},	/* UHF */

	{700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800},

	{863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800},
@@ -250,9 +262,7 @@ static const struct dib0070_tuning dib0070s_tuning_table[] = 
	{0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000},	/* SBAND */

};



static const struct dib0070_tuning dib0070_tuning_table[] =



{

static const struct dib0070_tuning dib0070_tuning_table[] = {

	{115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000},	/* FM below 92MHz cannot be tuned */

	{179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000},	/* VHF */

	{189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000},
@@ -263,9 +273,7 @@ static const struct dib0070_tuning dib0070_tuning_table[] = 
	{0xffffffff, 0, 1, 0, 2, 2, 4, 0x2000 | 0x0400},	/* LBAND or everything higher than UHF */

};



static const struct dib0070_lna_match dib0070_lna_flip_chip[] =



{

static const struct dib0070_lna_match dib0070_lna_flip_chip[] = {

	{180000, 0},		/* VHF */

	{188000, 1},

	{196400, 2},
@@ -280,9 +288,7 @@ static const struct dib0070_lna_match dib0070_lna_flip_chip[] = 
	{0xffffffff, 7},

};



static const struct dib0070_lna_match dib0070_lna[] =



{

static const struct dib0070_lna_match dib0070_lna[] = {

	{180000, 0},		/* VHF */

	{188000, 1},

	{196400, 2},
@@ -301,38 +307,37 @@ static const struct dib0070_lna_match dib0070_lna[] = 
#define LPF	100		// define for the loop filter 100kHz by default 16-07-06

static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)

{

    struct dib0070_state *st = fe->tuner_priv;

	struct dib0070_state *state = fe->tuner_priv;



	const struct dib0070_tuning *tune;

	const struct dib0070_lna_match *lna_match;



    enum frontend_tune_state *tune_state = &st->tune_state;

	enum frontend_tune_state *tune_state = &state->tune_state;

	int ret = 10;		/* 1ms is the default delay most of the time */



    u8  band = (u8)BAND_OF_FREQUENCY(ch->frequency/1000);

    u32 freq = ch->frequency/1000 + (band == BAND_VHF ? st->cfg->freq_offset_khz_vhf : st->cfg->freq_offset_khz_uhf);











#ifdef CONFIG_STANDARD_ISDBT

    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT && ch->u.isdbt.sb_mode == 1)

	if ( ( (ch->u.isdbt.sb_conn_total_seg % 2)       && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2) + 1) ) ) ||

	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg ==  (ch->u.isdbt.sb_conn_total_seg/2)      ) ) ||

	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2)+1))) )

	u8 band = (u8) BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);

	u32 freq = fe->dtv_property_cache.frequency / 1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz_vhf : state->cfg->freq_offset_khz_uhf);



#ifdef CONFIG_SYS_ISDBT

	if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)

		if (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2)

		     && (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))

		    || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)

			&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == (state->fe->dtv_property_cache.isdbt_sb_segment_count / 2)))

		    || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)

			&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1))))

			freq += 850;

#endif

    if (st->current_rf != freq) {

	if (state->current_rf != freq) {



	switch (st->revision) {

		switch (state->revision) {

		case DIB0070S_P1A:

			tune = dib0070s_tuning_table;

			lna_match = dib0070_lna;

			break;

		default:

			tune = dib0070_tuning_table;

	    if (st->cfg->flip_chip)

			if (state->cfg->flip_chip)

				lna_match = dib0070_lna_flip_chip;

			else

				lna_match = dib0070_lna;
@@ -343,45 +348,41 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par 
		while (freq > lna_match->max_freq)	/* find the right one */

			lna_match++;



	st->current_tune_table_index = tune;

	st->lna_match = lna_match;

		state->current_tune_table_index = tune;

		state->lna_match = lna_match;

	}



	if (*tune_state == CT_TUNER_START) {

		dprintk("Tuning for Band: %hd (%d kHz)", band, freq);

	if (st->current_rf != freq) {

		if (state->current_rf != freq) {

			u8 REFDIV;

			u32 FBDiv, Rest, FREF, VCOF_kHz;

			u8 Den;



	    st->current_rf = freq;

	    st->lo4 = (st->current_tune_table_index->vco_band << 11) | (st->current_tune_table_index->hfdiv << 7);



			state->current_rf = freq;

			state->lo4 = (state->current_tune_table_index->vco_band << 11) | (state->current_tune_table_index->hfdiv << 7);



	    dib0070_write_reg(st, 0x17, 0x30);

			dib0070_write_reg(state, 0x17, 0x30);





	    VCOF_kHz = st->current_tune_table_index->vco_multi * freq * 2;

			VCOF_kHz = state->current_tune_table_index->vco_multi * freq * 2;



			switch (band) {

			case BAND_VHF:

		REFDIV = (u8) ((st->cfg->clock_khz + 9999) / 10000);

				REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000);

				break;

			case BAND_FM:

		REFDIV = (u8) ((st->cfg->clock_khz) / 1000);

				REFDIV = (u8) ((state->cfg->clock_khz) / 1000);

				break;

			default:

		REFDIV = (u8) ( st->cfg->clock_khz  / 10000);

				REFDIV = (u8) (state->cfg->clock_khz / 10000);

				break;

			}

	    FREF = st->cfg->clock_khz / REFDIV;



			FREF = state->cfg->clock_khz / REFDIV;





	    switch (st->revision) {

			switch (state->revision) {

			case DIB0070S_P1A:

		FBDiv = (VCOF_kHz / st->current_tune_table_index->presc / FREF);

		Rest  = (VCOF_kHz / st->current_tune_table_index->presc) - FBDiv * FREF;

				FBDiv = (VCOF_kHz / state->current_tune_table_index->presc / FREF);

				Rest = (VCOF_kHz / state->current_tune_table_index->presc) - FBDiv * FREF;

				break;



			case DIB0070_P1G:
@@ -392,42 +393,45 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par 
				break;

			}





	    if (Rest < LPF)              Rest = 0;

	    else if (Rest < 2 * LPF)          Rest = 2 * LPF;

	    else if (Rest > (FREF - LPF))   { Rest = 0 ; FBDiv += 1; }

	    else if (Rest > (FREF - 2 * LPF)) Rest = FREF - 2 * LPF;

			if (Rest < LPF)

				Rest = 0;

			else if (Rest < 2 * LPF)

				Rest = 2 * LPF;

			else if (Rest > (FREF - LPF)) {

				Rest = 0;

				FBDiv += 1;

			} else if (Rest > (FREF - 2 * LPF))

				Rest = FREF - 2 * LPF;

			Rest = (Rest * 6528) / (FREF / 10);



			Den = 1;

			if (Rest > 0) {

		st->lo4 |= (1 << 14) | (1 << 12);

				state->lo4 |= (1 << 14) | (1 << 12);

				Den = 255;

			}



			dib0070_write_reg(state, 0x11, (u16) FBDiv);

			dib0070_write_reg(state, 0x12, (Den << 8) | REFDIV);

			dib0070_write_reg(state, 0x13, (u16) Rest);



	    dib0070_write_reg(st, 0x11, (u16)FBDiv);

	    dib0070_write_reg(st, 0x12, (Den << 8) | REFDIV);

	    dib0070_write_reg(st, 0x13, (u16) Rest);



	    if (st->revision == DIB0070S_P1A) {

			if (state->revision == DIB0070S_P1A) {



				if (band == BAND_SBAND) {

					dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);

		    dib0070_write_reg(st, 0x1d,0xFFFF);

					dib0070_write_reg(state, 0x1d, 0xFFFF);

				} else

					dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);

			}





	    dib0070_write_reg(st, 0x20, 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | st->current_tune_table_index->tuner_enable);

			dib0070_write_reg(state, 0x20,

					  0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | state->current_tune_table_index->tuner_enable);



			dprintk("REFDIV: %hd, FREF: %d", REFDIV, FREF);

			dprintk("FBDIV: %d, Rest: %d", FBDiv, Rest);

	    dprintk( "Num: %hd, Den: %hd, SD: %hd",(u16) Rest, Den, (st->lo4 >> 12) & 0x1);

	    dprintk( "HFDIV code: %hd", st->current_tune_table_index->hfdiv);

	    dprintk( "VCO = %hd", st->current_tune_table_index->vco_band);

	    dprintk( "VCOF: ((%hd*%d) << 1))", st->current_tune_table_index->vco_multi, freq);

			dprintk("Num: %hd, Den: %hd, SD: %hd", (u16) Rest, Den, (state->lo4 >> 12) & 0x1);

			dprintk("HFDIV code: %hd", state->current_tune_table_index->hfdiv);

			dprintk("VCO = %hd", state->current_tune_table_index->vco_band);

			dprintk("VCOF: ((%hd*%d) << 1))", state->current_tune_table_index->vco_multi, freq);



			*tune_state = CT_TUNER_STEP_0;

		} else {	/* we are already tuned to this frequency - the configuration is correct  */
@@ -436,29 +440,33 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par 
		}

	} else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {



	ret = dib0070_captrim(st, tune_state);

		ret = dib0070_captrim(state, tune_state);



	} else if (*tune_state == CT_TUNER_STEP_4) {

	const struct dib0070_wbd_gain_cfg *tmp = st->cfg->wbd_gain;

		const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;

		if (tmp != NULL) {

			while (freq / 1000 > tmp->freq)	/* find the right one */

				tmp++;

	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));

	    st->wbd_gain_current = tmp->wbd_gain_val;

			dib0070_write_reg(state, 0x0f,

					  (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (state->

																current_tune_table_index->

																wbdmux << 0));

			state->wbd_gain_current = tmp->wbd_gain_val;

		} else {

	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));

	    st->wbd_gain_current = 6;

			dib0070_write_reg(state, 0x0f,

					  (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (state->current_tune_table_index->

														wbdmux << 0));

			state->wbd_gain_current = 6;

		}



	dib0070_write_reg(st, 0x06, 0x3fff);

	dib0070_write_reg(st, 0x07, (st->current_tune_table_index->switch_trim << 11) | (7 << 8) | (st->lna_match->lna_band << 3) | (3 << 0));

	dib0070_write_reg(st, 0x08, (st->lna_match->lna_band << 10) | (3 << 7) | (127));

	dib0070_write_reg(st, 0x0d, 0x0d80);





	dib0070_write_reg(st, 0x18,   0x07ff);

	dib0070_write_reg(st, 0x17, 0x0033);

		dib0070_write_reg(state, 0x06, 0x3fff);

		dib0070_write_reg(state, 0x07,

				  (state->current_tune_table_index->switch_trim << 11) | (7 << 8) | (state->lna_match->lna_band << 3) | (3 << 0));

		dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127));

		dib0070_write_reg(state, 0x0d, 0x0d80);



		dib0070_write_reg(state, 0x18, 0x07ff);

		dib0070_write_reg(state, 0x17, 0x0033);



		*tune_state = CT_TUNER_STEP_5;

	} else if (*tune_state == CT_TUNER_STEP_5) {
@@ -470,7 +478,6 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par 
	return ret;

}





static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)

{

	struct dib0070_state *state = fe->tuner_priv;
@@ -491,23 +498,21 @@ static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters 


static int dib0070_wakeup(struct dvb_frontend *fe)

{

	struct dib0070_state *st = fe->tuner_priv;

	if (st->cfg->sleep)

		st->cfg->sleep(fe, 0);

	struct dib0070_state *state = fe->tuner_priv;

	if (state->cfg->sleep)

		state->cfg->sleep(fe, 0);

	return 0;

}



static int dib0070_sleep(struct dvb_frontend *fe)

{

	struct dib0070_state *st = fe->tuner_priv;

	if (st->cfg->sleep)

		st->cfg->sleep(fe, 1);

	struct dib0070_state *state = fe->tuner_priv;

	if (state->cfg->sleep)

		state->cfg->sleep(fe, 1);

	return 0;

}



static const u16 dib0070_p1f_defaults[] =



{

static const u16 dib0070_p1f_defaults[] = {

	7, 0x02,

	0x0008,

	0x0000,
@@ -569,11 +574,22 @@ static void dib0070_wbd_offset_calibration(struct dib0070_state *state) 


u16 dib0070_wbd_offset(struct dvb_frontend *fe)

{

	struct dib0070_state *st = fe->tuner_priv;

	return st->wbd_offset_3_3[st->wbd_gain_current - 6];

	struct dib0070_state *state = fe->tuner_priv;

	const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;

	u32 freq = fe->dtv_property_cache.frequency / 1000;



	if (tmp != NULL) {

		while (freq / 1000 > tmp->freq)	/* find the right one */

			tmp++;

		state->wbd_gain_current = tmp->wbd_gain_val;

	} else

		state->wbd_gain_current = 6;



	return state->wbd_offset_3_3[state->wbd_gain_current - 6];

}



EXPORT_SYMBOL(dib0070_wbd_offset);



#define pgm_read_word(w) (*w)

static int dib0070_reset(struct dvb_frontend *fe)

{
@@ -582,7 +598,6 @@ static int dib0070_reset(struct dvb_frontend *fe) 


	HARD_RESET(state);





#ifndef FORCE_SBAND_TUNER

	if ((dib0070_read_reg(state, 0x22) >> 9) & 0x1)

		state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff;
@@ -618,7 +633,6 @@ static int dib0070_reset(struct dvb_frontend *fe) 
	else

		r = 2;





	r |= state->cfg->osc_buffer_state << 3;



	dib0070_write_reg(state, 0x10, r);
@@ -641,7 +655,6 @@ static int dib0070_reset(struct dvb_frontend *fe) 
	return 0;

}





static int dib0070_release(struct dvb_frontend *fe)

{

	kfree(fe->tuner_priv);
@@ -691,6 +704,7 @@ struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter 
	fe->tuner_priv = NULL;

	return NULL;

}



EXPORT_SYMBOL(dib0070_attach);



MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");

drivers/media/dvb/frontends/dib0070.h

+14 −17
Original line number Diff line number Diff line
@@ -49,14 +49,10 @@ struct dib0070_config { 
};



#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))

extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe,

					   struct i2c_adapter *i2c,

					   struct dib0070_config *cfg);

extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);

extern u16 dib0070_wbd_offset(struct dvb_frontend *);

#else

static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe,

						  struct i2c_adapter *i2c,

						  struct dib0070_config *cfg)

static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)

{

	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);

	return NULL;
@@ -68,5 +64,6 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe) 
	return -ENODEV;

}

#endif

extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);



#endif