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Commit 27cd7769 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: reorganize copy callbacks 



tidy up the radeon_asic struct, handle multiple
rings better.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian <König&lt;christian.koenig@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 293f9fd5

drivers/gpu/drm/radeon/evergreen.c

+1 −1
Original line number Diff line number Diff line
@@ -3197,7 +3197,7 @@ static int evergreen_startup(struct radeon_device *rdev) 
	r = evergreen_blit_init(rdev);

	if (r) {

		r600_blit_fini(rdev);

		rdev->asic->copy = NULL;

		rdev->asic->copy.copy = NULL;

		dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);

	}

drivers/gpu/drm/radeon/ni.c

+1 −1
Original line number Diff line number Diff line
@@ -1466,7 +1466,7 @@ static int cayman_startup(struct radeon_device *rdev) 
	r = evergreen_blit_init(rdev);

	if (r) {

		r600_blit_fini(rdev);

		rdev->asic->copy = NULL;

		rdev->asic->copy.copy = NULL;

		dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);

	}

drivers/gpu/drm/radeon/r600.c

+1 −1
Original line number Diff line number Diff line
@@ -2449,7 +2449,7 @@ int r600_startup(struct radeon_device *rdev) 
	r = r600_blit_init(rdev);

	if (r) {

		r600_blit_fini(rdev);

		rdev->asic->copy = NULL;

		rdev->asic->copy.copy = NULL;

		dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);

	}

drivers/gpu/drm/radeon/radeon.h

+30 −20
Original line number Diff line number Diff line
@@ -1154,21 +1154,30 @@ struct radeon_asic { 
	int (*irq_set)(struct radeon_device *rdev);

	int (*irq_process)(struct radeon_device *rdev);

	u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);

	int (*copy_blit)(struct radeon_device *rdev,



	struct {

		int (*blit)(struct radeon_device *rdev,

			    uint64_t src_offset,

			    uint64_t dst_offset,

			    unsigned num_gpu_pages,

			    struct radeon_fence *fence);

	int (*copy_dma)(struct radeon_device *rdev,

		u32 blit_ring_index;

		int (*dma)(struct radeon_device *rdev,

			   uint64_t src_offset,

			   uint64_t dst_offset,

			   unsigned num_gpu_pages,

			   struct radeon_fence *fence);

		u32 dma_ring_index;

		/* method used for bo copy */

		int (*copy)(struct radeon_device *rdev,

			    uint64_t src_offset,

			    uint64_t dst_offset,

			    unsigned num_gpu_pages,

			    struct radeon_fence *fence);

		/* ring used for bo copies */

		u32 copy_ring_index;

	} copy;



	uint32_t (*get_engine_clock)(struct radeon_device *rdev);

	void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);

	uint32_t (*get_memory_clock)(struct radeon_device *rdev);
@@ -1505,8 +1514,6 @@ struct radeon_device { 
	unsigned 		debugfs_count;

	/* virtual memory */

	struct radeon_vm_manager	vm_manager;

	/* ring used for bo copies */

	u32				copy_ring;

};



int radeon_device_init(struct radeon_device *rdev,
@@ -1677,9 +1684,12 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); 
#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc))

#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence))

#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait))

#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f))

#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f))

#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f))

#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f))

#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f))

#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f))

#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index

#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index

#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index

#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))

#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))

#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))

drivers/gpu/drm/radeon/radeon_asic.c

+136 −54
Original line number Diff line number Diff line
@@ -151,9 +151,14 @@ static struct radeon_asic r100_asic = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_legacy_get_engine_clock,

	.set_engine_clock = &radeon_legacy_set_engine_clock,

	.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -211,9 +216,14 @@ static struct radeon_asic r200_asic = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_legacy_get_engine_clock,

	.set_engine_clock = &radeon_legacy_set_engine_clock,

	.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -270,9 +280,14 @@ static struct radeon_asic r300_asic = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_legacy_get_engine_clock,

	.set_engine_clock = &radeon_legacy_set_engine_clock,

	.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -330,9 +345,14 @@ static struct radeon_asic r300_asic_pcie = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_legacy_get_engine_clock,

	.set_engine_clock = &radeon_legacy_set_engine_clock,

	.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -389,9 +409,14 @@ static struct radeon_asic r420_asic = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -449,9 +474,14 @@ static struct radeon_asic rs400_asic = { 
	.irq_set = &r100_irq_set,

	.irq_process = &r100_irq_process,

	.get_vblank_counter = &r100_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_legacy_get_engine_clock,

	.set_engine_clock = &radeon_legacy_set_engine_clock,

	.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -509,9 +539,14 @@ static struct radeon_asic rs600_asic = { 
	.irq_set = &rs600_irq_set,

	.irq_process = &rs600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -569,9 +604,14 @@ static struct radeon_asic rs690_asic = { 
	.irq_set = &rs600_irq_set,

	.irq_process = &rs600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r200_copy_dma,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -629,9 +669,14 @@ static struct radeon_asic rv515_asic = { 
	.irq_set = &rs600_irq_set,

	.irq_process = &rs600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -689,9 +734,14 @@ static struct radeon_asic r520_asic = { 
	.irq_set = &rs600_irq_set,

	.irq_process = &rs600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r100_copy_blit,

	.copy_dma = &r200_copy_dma,

	.copy = {

		.blit = &r100_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r200_copy_dma,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r100_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -748,9 +798,14 @@ static struct radeon_asic r600_asic = { 
	.irq_set = &r600_irq_set,

	.irq_process = &r600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -807,9 +862,14 @@ static struct radeon_asic rs780_asic = { 
	.irq_set = &r600_irq_set,

	.irq_process = &r600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = NULL,
@@ -866,9 +926,14 @@ static struct radeon_asic rv770_asic = { 
	.irq_set = &r600_irq_set,

	.irq_process = &r600_irq_process,

	.get_vblank_counter = &rs600_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -925,9 +990,14 @@ static struct radeon_asic evergreen_asic = { 
	.irq_set = &evergreen_irq_set,

	.irq_process = &evergreen_irq_process,

	.get_vblank_counter = &evergreen_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -984,9 +1054,14 @@ static struct radeon_asic sumo_asic = { 
	.irq_set = &evergreen_irq_set,

	.irq_process = &evergreen_irq_process,

	.get_vblank_counter = &evergreen_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = NULL,
@@ -1043,9 +1118,14 @@ static struct radeon_asic btc_asic = { 
	.irq_set = &evergreen_irq_set,

	.irq_process = &evergreen_irq_process,

	.get_vblank_counter = &evergreen_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1127,9 +1207,14 @@ static struct radeon_asic cayman_asic = { 
	.irq_set = &evergreen_irq_set,

	.irq_process = &evergreen_irq_process,

	.get_vblank_counter = &evergreen_get_vblank_counter,

	.copy_blit = &r600_copy_blit,

	.copy_dma = NULL,

	.copy = {

		.blit = &r600_copy_blit,

		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = NULL,

		.dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

	},

	.get_engine_clock = &radeon_atom_get_engine_clock,

	.set_engine_clock = &radeon_atom_set_engine_clock,

	.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1174,9 +1259,6 @@ int radeon_asic_init(struct radeon_device *rdev) 
	else

		rdev->num_crtc = 2;



	/* set the ring used for bo copies */

	rdev->copy_ring = RADEON_RING_TYPE_GFX_INDEX;



	switch (rdev->family) {

	case CHIP_R100:

	case CHIP_RV100: