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Commit 27b58302 authored by Casey Piper's avatar Casey Piper Committed by Narendra Muppalla
Browse files

clk: qcom: mdss: add PLL clock support for 20nm HDMI PHY 



Add support for HDMI PLL on msm8994.
Support is added to register this new clock
driver. Also modify makefile to compile new
20nm PLL source and add support for registering
PLL clock driver for 20nm HDMI PHY.

Change-Id: I57421ac638075358c46ddd938e441a8e525f3a5a
Signed-off-by: default avatarCasey Piper <cpiper@codeaurora.org>
parent 2c123a10

drivers/clk/qcom/mdss/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,3 +6,4 @@ obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-28lpm.o 
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-20nm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-edp-pll-28hpm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-28hpm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-20nm.o

drivers/clk/qcom/mdss/mdss-hdmi-pll-20nm.c

0 → 100644
+1247 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/qcom/mdss/mdss-hdmi-pll.h

+2 −0
Original line number Diff line number Diff line
@@ -26,4 +26,6 @@ struct hdmi_pll_vco_clk { 
int hdmi_pll_clock_register(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);



int hdmi_20nm_pll_clock_register(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);

#endif

drivers/clk/qcom/mdss/mdss-pll.c

+5 −0
Original line number Diff line number Diff line
@@ -144,6 +144,8 @@ static int mdss_pll_resource_parse(struct platform_device *pdev, 
		pll_res->pll_interface_type = MDSS_EDP_PLL;

	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll")) {

		pll_res->pll_interface_type = MDSS_HDMI_PLL;

	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8994")) {

		pll_res->pll_interface_type = MDSS_HDMI_PLL_20NM;

	} else {

		goto err;

	}
@@ -181,6 +183,8 @@ static int mdss_pll_clock_register(struct platform_device *pdev, 
		break;

	case MDSS_HDMI_PLL:

		rc = hdmi_pll_clock_register(pdev, pll_res);

	case MDSS_HDMI_PLL_20NM:

		rc = hdmi_20nm_pll_clock_register(pdev, pll_res);

		break;

	case MDSS_UNKNOWN_PLL:

	default:
@@ -314,6 +318,7 @@ static int mdss_pll_remove(struct platform_device *pdev) 
static const struct of_device_id mdss_pll_dt_match[] = {

	{.compatible = "qcom,mdss_dsi_pll_8974"},

	{.compatible = "qcom,mdss_dsi_pll_8994"},

	{.compatible = "qcom,mdss_hdmi_pll_8994"},

	{.compatible = "qcom,mdss_dsi_pll_8916"},

	{.compatible = "qcom,mdss_dsi_pll_8939"},

	{.compatible = "qcom,mdss_edp_pll"},

drivers/clk/qcom/mdss/mdss-pll.h

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ enum { 
	MDSS_DSI_PLL_20NM,

	MDSS_EDP_PLL,

	MDSS_HDMI_PLL,

	MDSS_HDMI_PLL_20NM,

	MDSS_UNKNOWN_PLL,

};