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Commit 26bbf0b5 authored by Russell King's avatar Russell King
Browse files

ARM: pgtable: remove L2 cache flushes for SMP page table bring-up 



The MMU is always configured to read page tables from the L2 cache
so there's little point flushing them out of the L2 cache back to
RAM.  Remove these flushes.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent d30e45ee

arch/arm/kernel/smp.c

+0 −2
Original line number Diff line number Diff line
@@ -85,7 +85,6 @@ static inline void identity_mapping_add(pgd_t *pgd, unsigned long start, 
		pmd[1] = __pmd(addr | prot);

		addr += SECTION_SIZE;

		flush_pmd_entry(pmd);

		outer_clean_range(__pa(pmd), __pa(pmd + 1));

	}

}
@@ -100,7 +99,6 @@ static inline void identity_mapping_del(pgd_t *pgd, unsigned long start, 
		pmd[0] = __pmd(0);

		pmd[1] = __pmd(0);

		clean_pmd_entry(pmd);

		outer_clean_range(__pa(pmd), __pa(pmd + 1));

	}

}