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Commit 266bdc5d authored by Chanwoo Choi's avatar Chanwoo Choi Committed by Krzysztof Kozlowski
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ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 



This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.

Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: default avatarMarkus Reichl <m.reichl@fivetechno.de>
Tested-by: default avatarAnand Moon <linux.amoon@gmail.com>
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
parent 304d10ab

arch/arm/boot/dts/exynos4x12.dtsi

+68 −0
Original line number Diff line number Diff line
@@ -281,6 +281,74 @@ 
		clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;

		#iommu-cells = <0>;

	};



	bus_dmc: bus_dmc {

		compatible = "samsung,exynos-bus";

		clocks = <&clock CLK_DIV_DMC>;

		clock-names = "bus";

		operating-points-v2 = <&bus_dmc_opp_table>;

		status = "disabled";

	};



	bus_acp: bus_acp {

		compatible = "samsung,exynos-bus";

		clocks = <&clock CLK_DIV_ACP>;

		clock-names = "bus";

		operating-points-v2 = <&bus_acp_opp_table>;

		status = "disabled";

	};



	bus_c2c: bus_c2c {

		compatible = "samsung,exynos-bus";

		clocks = <&clock CLK_DIV_C2C>;

		clock-names = "bus";

		operating-points-v2 = <&bus_dmc_opp_table>;

		status = "disabled";

	};



	bus_dmc_opp_table: opp_table1 {

		compatible = "operating-points-v2";

		opp-shared;



		opp@100000000 {

			opp-hz = /bits/ 64 <100000000>;

			opp-microvolt = <900000>;

		};

		opp@134000000 {

			opp-hz = /bits/ 64 <134000000>;

			opp-microvolt = <900000>;

		};

		opp@160000000 {

			opp-hz = /bits/ 64 <160000000>;

			opp-microvolt = <900000>;

		};

		opp@267000000 {

			opp-hz = /bits/ 64 <267000000>;

			opp-microvolt = <950000>;

		};

		opp@400000000 {

			opp-hz = /bits/ 64 <400000000>;

			opp-microvolt = <1050000>;

		};

	};



	bus_acp_opp_table: opp_table2 {

		compatible = "operating-points-v2";

		opp-shared;



		opp@100000000 {

			opp-hz = /bits/ 64 <100000000>;

		};

		opp@134000000 {

			opp-hz = /bits/ 64 <134000000>;

		};

		opp@160000000 {

			opp-hz = /bits/ 64 <160000000>;

		};

		opp@267000000 {

			opp-hz = /bits/ 64 <267000000>;

		};

	};

};



&combiner {