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Commit 26011eee authored by Jiang Liu's avatar Jiang Liu Committed by Thomas Gleixner
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x86, irq: Refine hw_irq.h to prepare for irqdomain support 



Refine hw_irq.h to prepare for irqdomain support by:

1) guarding common APIC related interfaces with CONFIG_X86_LOCAL_APIC
2) guarding interrupt remapping related interfaces with CONFIG_IRQ_REMAP
3) guarding IOAPIC related interfaces with CONFIG_X86_IO_APIC

No functional changes.

Signed-off-by: default avatarJiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Prarit Bhargava <prarit@redhat.com>
Link: http://lkml.kernel.org/r/1414397531-28254-6-git-send-email-jiang.liu@linux.intel.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent a178b87b

arch/x86/include/asm/hw_irq.h

+51 −43
Original line number Diff line number Diff line
@@ -94,30 +94,7 @@ extern void trace_call_function_single_interrupt(void); 
#define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi

#endif /* CONFIG_TRACING */



/* IOAPIC */

#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))

extern unsigned long io_apic_irqs;



extern void setup_IO_APIC(void);

extern void disable_IO_APIC(void);



struct io_apic_irq_attr {

	int ioapic;

	int ioapic_pin;

	int trigger;

	int polarity;

};



static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,

					int ioapic, int ioapic_pin,

					int trigger, int polarity)

{

	irq_attr->ioapic	= ioapic;

	irq_attr->ioapic_pin	= ioapic_pin;

	irq_attr->trigger	= trigger;

	irq_attr->polarity	= polarity;

}



#ifdef CONFIG_IRQ_REMAP

/* Intel specific interrupt remapping information */

struct irq_2_iommu {

	struct intel_iommu *iommu;
@@ -131,14 +108,10 @@ struct irq_2_irte { 
	u16 devid; /* Device ID for IRTE table */

	u16 index; /* Index into IRTE table*/

};

#endif	/* CONFIG_IRQ_REMAP */



/*

 * This is performance-critical, we want to do it O(1)

 *

 * Most irqs are mapped 1:1 with pins.

 */

#ifdef	CONFIG_X86_LOCAL_APIC

struct irq_cfg {

	struct list_head	irq_2_pin;

	cpumask_var_t		domain;

	cpumask_var_t		old_domain;

	u8			vector;
@@ -150,8 +123,16 @@ struct irq_cfg { 
		struct irq_2_irte  irq_2_irte;

	};

#endif

	union {

#ifdef CONFIG_X86_IO_APIC

		struct {

			struct list_head	irq_2_pin;

		};

#endif

	};

};



extern void setup_vector_irq(int cpu);

extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);

#ifdef CONFIG_SMP

extern void send_cleanup_vector(struct irq_cfg *);
@@ -162,10 +143,48 @@ static inline void send_cleanup_vector(struct irq_cfg *c) { } 
struct irq_data;

int __ioapic_set_affinity(struct irq_data *, const struct cpumask *,

			  unsigned int *dest_id);

extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);

extern void setup_ioapic_dest(void);

#endif	/* CONFIG_X86_LOCAL_APIC */



#ifdef CONFIG_X86_IO_APIC

extern void lock_vector_lock(void);

extern void unlock_vector_lock(void);

extern void __setup_vector_irq(int cpu);

#else

static inline void lock_vector_lock(void) {}

static inline void unlock_vector_lock(void) {}

static inline void __setup_vector_irq(int cpu) {}

#endif



/* IOAPIC */

#ifdef CONFIG_X86_IO_APIC

struct io_apic_irq_attr {

	int ioapic;

	int ioapic_pin;

	int trigger;

	int polarity;

};



static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,

					int ioapic, int ioapic_pin,

					int trigger, int polarity)

{

	irq_attr->ioapic	= ioapic;

	irq_attr->ioapic_pin	= ioapic_pin;

	irq_attr->trigger	= trigger;

	irq_attr->polarity	= polarity;

}



extern void setup_IO_APIC(void);

extern void enable_IO_APIC(void);

extern void disable_IO_APIC(void);

extern void setup_ioapic_dest(void);

extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);



extern unsigned long io_apic_irqs;

#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))

#else	/* CONFIG_X86_IO_APIC */

#define IO_APIC_IRQ(x)	0

#endif	/* CONFIG_X86_IO_APIC */



/* Statistics */

extern atomic_t irq_err_count;
@@ -200,17 +219,6 @@ extern void (*__initconst interrupt[FIRST_SYSTEM_VECTOR 


typedef int vector_irq_t[NR_VECTORS];

DECLARE_PER_CPU(vector_irq_t, vector_irq);

extern void setup_vector_irq(int cpu);



#ifdef CONFIG_X86_IO_APIC

extern void lock_vector_lock(void);

extern void unlock_vector_lock(void);

extern void __setup_vector_irq(int cpu);

#else

static inline void lock_vector_lock(void) {}

static inline void unlock_vector_lock(void) {}

static inline void __setup_vector_irq(int cpu) {}

#endif



#endif /* !ASSEMBLY_ */