Loading arch/arm/mach-omap2/board-generic.c +1 −1 Original line number Diff line number Diff line Loading @@ -169,7 +169,7 @@ static const char *const ti814x_boards_compat[] __initconst = { NULL, }; DT_MACHINE_START(TI81XX_DT, "Generic ti814x (Flattened Device Tree)") DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") .reserve = omap_reserve, .map_io = ti81xx_map_io, .init_early = ti814x_init_early, Loading arch/arm/mach-omap2/clockdomain.h +2 −1 Original line number Diff line number Diff line Loading @@ -216,7 +216,8 @@ extern void __init omap242x_clockdomains_init(void); extern void __init omap243x_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); extern void __init am33xx_clockdomains_init(void); extern void __init ti81xx_clockdomains_init(void); extern void __init ti814x_clockdomains_init(void); extern void __init ti816x_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); extern void __init omap54xx_clockdomains_init(void); extern void __init dra7xx_clockdomains_init(void); Loading arch/arm/mach-omap2/clockdomains81xx_data.c +20 −3 Original line number Diff line number Diff line Loading @@ -165,7 +165,24 @@ static struct clockdomain default_l3_slow_816x_clkdm = { .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain *clockdomains_ti81xx[] __initdata = { static struct clockdomain *clockdomains_ti814x[] __initdata = { &alwon_l3_slow_81xx_clkdm, &alwon_l3_med_81xx_clkdm, &alwon_l3_fast_81xx_clkdm, &alwon_ethernet_81xx_clkdm, &mmu_81xx_clkdm, &mmu_cfg_81xx_clkdm, NULL, }; void __init ti814x_clockdomains_init(void) { clkdm_register_platform_funcs(&am33xx_clkdm_operations); clkdm_register_clkdms(clockdomains_ti814x); clkdm_complete_init(); } static struct clockdomain *clockdomains_ti816x[] __initdata = { &alwon_mpu_816x_clkdm, &alwon_l3_slow_81xx_clkdm, &alwon_l3_med_81xx_clkdm, Loading @@ -185,10 +202,10 @@ static struct clockdomain *clockdomains_ti81xx[] __initdata = { NULL, }; void __init ti81xx_clockdomains_init(void) void __init ti816x_clockdomains_init(void) { clkdm_register_platform_funcs(&am33xx_clkdm_operations); clkdm_register_clkdms(clockdomains_ti81xx); clkdm_register_clkdms(clockdomains_ti816x); clkdm_complete_init(); } #endif arch/arm/mach-omap2/control.c +1 −0 Original line number Diff line number Diff line Loading @@ -652,6 +652,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am4-scm", .data = &ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,dm814-scm", .data = &ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { .compatible = "ti,omap4-scm-core", .data = &ctrl_data }, { .compatible = "ti,omap5-scm-core", .data = &ctrl_data }, Loading arch/arm/mach-omap2/io.c +6 −6 Original line number Diff line number Diff line Loading @@ -608,11 +608,11 @@ void __init ti814x_init_early(void) omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); ti81xx_hwmod_init(); ti814x_clockdomains_init(); dm814x_hwmod_init(); omap_hwmod_init_postsetup(); if (of_have_populated_dt()) omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm814x_dt_clk_init; } void __init ti816x_init_early(void) Loading @@ -625,11 +625,11 @@ void __init ti816x_init_early(void) omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); ti81xx_hwmod_init(); ti816x_clockdomains_init(); dm816x_hwmod_init(); omap_hwmod_init_postsetup(); if (of_have_populated_dt()) omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm816x_dt_clk_init; } #endif Loading Loading
arch/arm/mach-omap2/board-generic.c +1 −1 Original line number Diff line number Diff line Loading @@ -169,7 +169,7 @@ static const char *const ti814x_boards_compat[] __initconst = { NULL, }; DT_MACHINE_START(TI81XX_DT, "Generic ti814x (Flattened Device Tree)") DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") .reserve = omap_reserve, .map_io = ti81xx_map_io, .init_early = ti814x_init_early, Loading
arch/arm/mach-omap2/clockdomain.h +2 −1 Original line number Diff line number Diff line Loading @@ -216,7 +216,8 @@ extern void __init omap242x_clockdomains_init(void); extern void __init omap243x_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); extern void __init am33xx_clockdomains_init(void); extern void __init ti81xx_clockdomains_init(void); extern void __init ti814x_clockdomains_init(void); extern void __init ti816x_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); extern void __init omap54xx_clockdomains_init(void); extern void __init dra7xx_clockdomains_init(void); Loading
arch/arm/mach-omap2/clockdomains81xx_data.c +20 −3 Original line number Diff line number Diff line Loading @@ -165,7 +165,24 @@ static struct clockdomain default_l3_slow_816x_clkdm = { .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain *clockdomains_ti81xx[] __initdata = { static struct clockdomain *clockdomains_ti814x[] __initdata = { &alwon_l3_slow_81xx_clkdm, &alwon_l3_med_81xx_clkdm, &alwon_l3_fast_81xx_clkdm, &alwon_ethernet_81xx_clkdm, &mmu_81xx_clkdm, &mmu_cfg_81xx_clkdm, NULL, }; void __init ti814x_clockdomains_init(void) { clkdm_register_platform_funcs(&am33xx_clkdm_operations); clkdm_register_clkdms(clockdomains_ti814x); clkdm_complete_init(); } static struct clockdomain *clockdomains_ti816x[] __initdata = { &alwon_mpu_816x_clkdm, &alwon_l3_slow_81xx_clkdm, &alwon_l3_med_81xx_clkdm, Loading @@ -185,10 +202,10 @@ static struct clockdomain *clockdomains_ti81xx[] __initdata = { NULL, }; void __init ti81xx_clockdomains_init(void) void __init ti816x_clockdomains_init(void) { clkdm_register_platform_funcs(&am33xx_clkdm_operations); clkdm_register_clkdms(clockdomains_ti81xx); clkdm_register_clkdms(clockdomains_ti816x); clkdm_complete_init(); } #endif
arch/arm/mach-omap2/control.c +1 −0 Original line number Diff line number Diff line Loading @@ -652,6 +652,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am4-scm", .data = &ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,dm814-scm", .data = &ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { .compatible = "ti,omap4-scm-core", .data = &ctrl_data }, { .compatible = "ti,omap5-scm-core", .data = &ctrl_data }, Loading
arch/arm/mach-omap2/io.c +6 −6 Original line number Diff line number Diff line Loading @@ -608,11 +608,11 @@ void __init ti814x_init_early(void) omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); ti81xx_hwmod_init(); ti814x_clockdomains_init(); dm814x_hwmod_init(); omap_hwmod_init_postsetup(); if (of_have_populated_dt()) omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm814x_dt_clk_init; } void __init ti816x_init_early(void) Loading @@ -625,11 +625,11 @@ void __init ti816x_init_early(void) omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); ti81xx_hwmod_init(); ti816x_clockdomains_init(); dm816x_hwmod_init(); omap_hwmod_init_postsetup(); if (of_have_populated_dt()) omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm816x_dt_clk_init; } #endif Loading