tridentfb: coding style improvement (245a2c2c) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/video/tridentfb.c

+592 −483

Original line number	Diff line number	Diff line
		@@ -7,9 +7,10 @@
		* CREDITS:(in order of appearance)
		* skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
		* Special thanks ;) to Mattia Crivellini <tia@mclink.it>
		* much inspired by the XFree86 4.x Trident driver sources by Alan Hourihane
		* the FreeVGA project
		* Francesco Salvestrini <salvestrini@users.sf.net> XP support,code,suggestions
		* much inspired by the XFree86 4.x Trident driver sources
		* by Alan Hourihane the FreeVGA project
		* Francesco Salvestrini <salvestrini@users.sf.net> XP support,
		* code, suggestions
		* TODO:
		* timing value tweaking so it looks good on every monitor in every mode
		* TGUI acceleration
		@@ -26,11 +27,11 @@
		#define VERSION "0.7.8-NEWAPI"

		struct tridentfb_par {
		int vclk; //in MHz
		void __iomem * io_virt; //iospace virtual memory address
		int vclk; /* in MHz */
		void __iomem io_virt; / iospace virtual memory address */
		};

		static unsigned char eng_oper; //engine operation...
		static unsigned char eng_oper; /* engine operation... */
		static struct fb_ops tridentfb_ops;

		static struct tridentfb_par default_par;
		@@ -39,7 +40,6 @@ static struct tridentfb_par default_par;
		static struct fb_info fb_info;
		static u32 pseudo_pal[16];


		static struct fb_var_screeninfo default_var;

		static struct fb_fix_screeninfo tridentfb_fix = {
		@@ -55,7 +55,6 @@ static int chip_id;
		static int defaultaccel;
		static int displaytype;


		/* defaults which are normally overriden by user values */

		/* video mode */
		@@ -74,7 +73,6 @@ static int memsize;
		static int memdiff;
		static int nativex;


		module_param(mode, charp, 0);
		module_param(bpp, int, 0);
		module_param(center, int, 0);
		@@ -86,7 +84,6 @@ module_param(nativex, int, 0);
		module_param(fp, int, 0);
		module_param(crt, int, 0);


		static int chip3D;
		static int chipcyber;

		@@ -136,7 +133,7 @@ static int iscyber(int id)
		}
		}

		#define CRT 0x3D0 //CRTC registers offset for color display
		#define CRT 0x3D0 /* CRTC registers offset for color display */

		#ifndef TRIDENT_MMIO
		#define TRIDENT_MMIO 1
		@@ -154,15 +151,13 @@ static int iscyber(int id)
		static struct accel_switch {
		void (*init_accel) (int, int);
		void (*wait_engine) (void);
		void (*fill_rect)(__u32,__u32,__u32,__u32,__u32,__u32);
		void (*copy_rect)(__u32,__u32,__u32,__u32,__u32,__u32);
		void (*fill_rect) (u32, u32, u32, u32, u32, u32);
		void (*copy_rect) (u32, u32, u32, u32, u32, u32);
		} *acc;

		#define writemmr(r, v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r)
		#define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r)



		/*
		* Blade specific acceleration.
		*/
		@@ -184,11 +179,19 @@ static void blade_init_accel(int pitch,int bpp)
		int v1 = (pitch >> 3) << 20;
		int tmp = 0, v2;
		switch (bpp) {
		case 8:tmp = 0;break;
		case 15:tmp = 5;break;
		case 16:tmp = 1;break;
		case 8:
		tmp = 0;
		break;
		case 15:
		tmp = 5;
		break;
		case 16:
		tmp = 1;
		break;
		case 24:
		case 32:tmp = 2;break;
		case 32:
		tmp = 2;
		break;
		}
		v2 = v1 \| (tmp << 29);
		writemmr(0x21C0, v2);
		@@ -207,7 +210,7 @@ static void blade_wait_engine(void)
		while (readmmr(STA) & 0xFA800000) ;
		}

		static void blade_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
		static void blade_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
		{
		writemmr(CLR, c);
		writemmr(ROP, rop ? 0x66 : ROP_S);
		@@ -217,9 +220,9 @@ static void blade_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
		writemmr(DR2, point(x + w - 1, y + h - 1));
		}

		static void blade_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
		static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
		{
		__u32 s1,s2,d1,d2;
		u32 s1, s2, d1, d2;
		int direction = 2;
		s1 = point(x1, y1);
		s2 = point(x1 + w - 1, y1 + h - 1);
		@@ -229,7 +232,6 @@ static void blade_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
		if ((y1 > y2) \|\| ((y1 == y2) && (x1 > x2)))
		direction = 0;


		writemmr(ROP, ROP_S);
		writemmr(CMD, 0xE0000000 \| 1 << 19 \| 1 << 4 \| 1 << 2 \| direction);

		@@ -246,7 +248,6 @@ static struct accel_switch accel_blade = {
		blade_copy_rect,
		};


		/*
		* BladeXP specific acceleration functions
		*/
		@@ -260,18 +261,34 @@ static void xp_init_accel(int pitch,int bpp)
		unsigned char x = 0;

		switch (bpp) {
		case 8: x = 0; break;
		case 16: x = 1; break;
		case 24: x = 3; break;
		case 32: x = 2; break;
		case 8:
		x = 0;
		break;
		case 16:
		x = 1;
		break;
		case 24:
		x = 3;
		break;
		case 32:
		x = 2;
		break;
		}

		switch (pitch << (bpp >> 3)) {
		case 8192:
		case 512: x \|= 0x00; break;
		case 1024: x \|= 0x04; break;
		case 2048: x \|= 0x08; break;
		case 4096: x \|= 0x0C; break;
		case 512:
		x \|= 0x00;
		break;
		case 1024:
		x \|= 0x04;
		break;
		case 2048:
		x \|= 0x08;
		break;
		case 4096:
		x \|= 0x0C;
		break;
		}

		t_outb(x, 0x2125);
		@@ -279,11 +296,17 @@ static void xp_init_accel(int pitch,int bpp)
		eng_oper = x \| 0x40;

		switch (bpp) {
		case 8: tmp = 18; break;
		case 8:
		tmp = 18;
		break;
		case 15:
		case 16: tmp = 19; break;
		case 16:
		tmp = 19;
		break;
		case 24:
		case 32: tmp = 20; break;
		case 32:
		tmp = 20;
		break;
		}

		v1 = pitch << tmp;
		@@ -318,7 +341,7 @@ static void xp_wait_engine(void)
		}
		}

		static void xp_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
		static void xp_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
		{
		writemmr(0x2127, ROP_P);
		writemmr(0x2158, c);
		@@ -329,10 +352,10 @@ static void xp_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
		t_outb(eng_oper, 0x2125);
		}

		static void xp_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
		static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
		{
		int direction;
		__u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
		u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;

		direction = 0x0004;

		@@ -369,7 +392,6 @@ static struct accel_switch accel_xp = {
		xp_copy_rect,
		};


		/*
		* Image specific acceleration functions
		*/
		@@ -377,11 +399,19 @@ static void image_init_accel(int pitch,int bpp)
		{
		int tmp = 0;
		switch (bpp) {
		case 8:tmp = 0;break;
		case 15:tmp = 5;break;
		case 16:tmp = 1;break;
		case 8:
		tmp = 0;
		break;
		case 15:
		tmp = 5;
		break;
		case 16:
		tmp = 1;
		break;
		case 24:
		case 32:tmp = 2;break;
		case 32:
		tmp = 2;
		break;
		}
		writemmr(0x2120, 0xF0000000);
		writemmr(0x2120, 0x40000000 \| tmp);
		@@ -403,7 +433,7 @@ static void image_wait_engine(void)
		while (readmmr(0x2164) & 0xF0000000) ;
		}

		static void image_fill_rect(__u32 x, __u32 y, __u32 w, __u32 h, __u32 c, __u32 rop)
		static void image_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
		{
		writemmr(0x2120, 0x80000000);
		writemmr(0x2120, 0x90000000 \| ROP_S);
		@@ -416,9 +446,9 @@ static void image_fill_rect(__u32 x, __u32 y, __u32 w, __u32 h, __u32 c, __u32 r
		writemmr(0x2124, 0x80000000 \| 3 << 22 \| 1 << 10 \| 1 << 9);
		}

		static void image_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
		static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
		{
		__u32 s1,s2,d1,d2;
		u32 s1, s2, d1, d2;
		int direction = 2;
		s1 = point(x1, y1);
		s2 = point(x1 + w - 1, y1 + h - 1);
		@@ -438,7 +468,6 @@ static void image_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
		writemmr(0x2124, 0x80000000 \| 1 << 22 \| 1 << 10 \| 1 << 7 \| direction);
		}


		static struct accel_switch accel_image = {
		image_init_accel,
		image_wait_engine,
		@@ -450,28 +479,32 @@ static struct accel_switch accel_image = {
		* Accel functions called by the upper layers
		*/
		#ifdef CONFIG_FB_TRIDENT_ACCEL
		static void tridentfb_fillrect(struct fb_info * info, const struct fb_fillrect *fr)
		static void tridentfb_fillrect(struct fb_info *info,
		const struct fb_fillrect *fr)
		{
		int bpp = info->var.bits_per_pixel;
		int col = 0;

		switch (bpp) {
		default:
		case 8: col \|= fr->color;
		case 8:
		col \|= fr->color;
		col \|= col << 8;
		col \|= col << 16;
		break;
		case 16: col = ((u32 *)(info->pseudo_palette))[fr->color];

		case 16:
		col = ((u32 *)(info->pseudo_palette))[fr->color];
		break;
		case 32: col = ((u32 *)(info->pseudo_palette))[fr->color];
		case 32:
		col = ((u32 *)(info->pseudo_palette))[fr->color];
		break;
		}

		acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop);
		acc->wait_engine();
		}
		static void tridentfb_copyarea(struct fb_info info, const struct fb_copyarea ca)
		static void tridentfb_copyarea(struct fb_info *info,
		const struct fb_copyarea *ca)
		{
		acc->copy_rect(ca->sx, ca->sy, ca->dx, ca->dy, ca->width, ca->height);
		acc->wait_engine();
		@@ -520,7 +553,7 @@ static inline unsigned char read3CE(int reg)

		static inline void writeAttr(int reg, unsigned char val)
		{
		readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); //flip-flop to index
		readb(((struct tridentfb_par )fb_info.par)->io_virt + CRT + 0x0A); / flip-flop to index */
		t_outb(reg, 0x3C0);
		t_outb(val, 0x3C0);
		}
		@@ -546,7 +579,6 @@ static inline void enable_mmio(void)
		outb(inb(0x3D5) \| 0x01, 0x3D5);
		}


		#define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F)

		/* Return flat panel's maximum x resolution */
		@@ -560,12 +592,22 @@ static int __devinit get_nativex(void)
		tmp = (read3CE(VertStretch) >> 4) & 3;

		switch (tmp) {
		case 0: x = 1280; y = 1024; break;
		case 2: x = 1024; y = 768; break;
		case 3: x = 800; y = 600; break;
		case 4: x = 1400; y = 1050; break;
		case 0:
		x = 1280; y = 1024;
		break;
		case 2:
		x = 1024; y = 768;
		break;
		case 3:
		x = 800; y = 600;
		break;
		case 4:
		x = 1400; y = 1050;
		break;
		case 1:
		default:x = 640; y = 480; break;
		default:
		x = 640; y = 480;
		break;
		}

		output("%dx%d flat panel found\n", x, y);
		@@ -576,7 +618,8 @@ static int __devinit get_nativex(void)
		static void set_lwidth(int width)
		{
		write3X4(Offset, width & 0xFF);
		write3X4(AddColReg, (read3X4(AddColReg) & 0xCF) \| ((width & 0x300) >>4));
		write3X4(AddColReg,
		(read3X4(AddColReg) & 0xCF) \| ((width & 0x300) >> 4));
		}

		/* For resolutions smaller than FP resolution stretch */
		@@ -602,8 +645,10 @@ static void set_screen_start(int base)
		{
		write3X4(StartAddrLow, base & 0xFF);
		write3X4(StartAddrHigh, (base & 0xFF00) >> 8);
		write3X4(CRTCModuleTest, (read3X4(CRTCModuleTest) & 0xDF) \| ((base & 0x10000) >> 11));
		write3X4(CRTHiOrd, (read3X4(CRTHiOrd) & 0xF8) \| ((base & 0xE0000) >> 17));
		write3X4(CRTCModuleTest,
		(read3X4(CRTCModuleTest) & 0xDF) \| ((base & 0x10000) >> 11));
		write3X4(CRTHiOrd,
		(read3X4(CRTHiOrd) & 0xF8) \| ((base & 0xE0000) >> 17));
		}

		/* Use 20.12 fixed-point for NTSC value and frequency calculation */
		@@ -677,34 +722,68 @@ static unsigned int __devinit get_memsize(void)
		k = memsize * Kb;
		else
		switch (chip_id) {
		case CYBER9525DVD: k = 2560 * Kb; break;
		case CYBER9525DVD:
		k = 2560 * Kb;
		break;
		default:
		tmp = read3X4(SPR) & 0x0F;
		switch (tmp) {

		case 0x01: k = 512; break;
		case 0x02: k = 6 * Mb; break; /* XP */
		case 0x03: k = 1 * Mb; break;
		case 0x04: k = 8 * Mb; break;
		case 0x06: k = 10 * Mb; break; /* XP */
		case 0x07: k = 2 * Mb; break;
		case 0x08: k = 12 * Mb; break; /* XP */
		case 0x0A: k = 14 * Mb; break; /* XP */
		case 0x0C: k = 16 * Mb; break; /* XP */
		case 0x01:
		k = 512;
		break;
		case 0x02:
		k = 6 * Mb; /* XP */
		break;
		case 0x03:
		k = 1 * Mb;
		break;
		case 0x04:
		k = 8 * Mb;
		break;
		case 0x06:
		k = 10 * Mb; /* XP */
		break;
		case 0x07:
		k = 2 * Mb;
		break;
		case 0x08:
		k = 12 * Mb; /* XP */
		break;
		case 0x0A:
		k = 14 * Mb; /* XP */
		break;
		case 0x0C:
		k = 16 * Mb; /* XP */
		break;
		case 0x0E: /* XP */

		tmp2 = read3C4(0xC1);
		switch (tmp2) {
		case 0x00: k = 20 * Mb; break;
		case 0x01: k = 24 * Mb; break;
		case 0x10: k = 28 * Mb; break;
		case 0x11: k = 32 * Mb; break;
		default: k = 1 * Mb; break;
		case 0x00:
		k = 20 * Mb;
		break;
		case 0x01:
		k = 24 * Mb;
		break;
		case 0x10:
		k = 28 * Mb;
		break;
		case 0x11:
		k = 32 * Mb;
		break;
		default:
		k = 1 * Mb;
		break;
		}
		break;

		case 0x0F: k = 4 * Mb; break;
		default: k = 1 * Mb;
		case 0x0F:
		k = 4 * Mb;
		break;
		default:
		k = 1 * Mb;
		break;
		}
		}

		@@ -714,7 +793,8 @@ static unsigned int __devinit get_memsize(void)
		}

		/* See if we can handle the video mode described in var */
		static int tridentfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
		static int tridentfb_check_var(struct fb_var_screeninfo *var,
		struct fb_info *info)
		{
		int bpp = var->bits_per_pixel;
		debug("enter\n");
		@@ -761,6 +841,7 @@ static int tridentfb_check_var(struct fb_var_screeninfo var, struct fb_info in
		return 0;

		}

		/* Pan the display */
		static int tridentfb_pan_display(struct fb_var_screeninfo *var,
		struct fb_info *info)
		@@ -784,23 +865,25 @@ static int tridentfb_pan_display(struct fb_var_screeninfo *var,
		static int tridentfb_set_par(struct fb_info *info)
		{
		struct tridentfb_par par = (struct tridentfb_par )(info->par);
		u32 htotal,hdispend,hsyncstart,hsyncend,hblankstart,hblankend,
		vtotal,vdispend,vsyncstart,vsyncend,vblankstart,vblankend;
		u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
		u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
		struct fb_var_screeninfo *var = &info->var;
		int bpp = var->bits_per_pixel;
		unsigned char tmp;
		debug("enter\n");
		htotal = (var->xres + var->left_margin + var->right_margin + var->hsync_len)/8 - 10;
		hdispend = var->xres / 8 - 1;
		hsyncstart = (var->xres + var->right_margin) / 8;
		hsyncend = var->hsync_len / 8;
		htotal =
		(var->xres + var->left_margin + var->right_margin +
		var->hsync_len) / 8 - 10;
		hblankstart = hdispend + 1;
		hblankend = htotal + 5;

		vtotal = var->yres + var->upper_margin + var->lower_margin + var->vsync_len - 2;
		vdispend = var->yres - 1;
		vsyncstart = var->yres + var->lower_margin;
		vsyncend = var->vsync_len;
		vtotal = var->upper_margin + vsyncstart + vsyncend - 2;
		vblankstart = var->yres;
		vblankend = vtotal + 2;

		@@ -856,7 +939,7 @@ static int tridentfb_set_par(struct fb_info *info)
		if (vsyncstart & 0x200) tmp \|= 0x80;
		write3X4(CRTOverflow, tmp);

		tmp = read3X4(CRTHiOrd) \| 0x08; //line compare bit 10
		tmp = read3X4(CRTHiOrd) \| 0x08; /* line compare bit 10 */
		if (vtotal & 0x400) tmp \|= 0x80;
		if (vblankstart & 0x400) tmp \|= 0x40;
		if (vsyncstart & 0x400) tmp \|= 0x20;
		@@ -870,29 +953,37 @@ static int tridentfb_set_par(struct fb_info *info)

		tmp = 0x40;
		if (vblankstart & 0x200) tmp \|= 0x20;
		//FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp \|= 0x80; //double scan for 200 line modes
		//FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp \|= 0x80; /* double scan for 200 line modes */
		write3X4(CRTMaxScanLine, tmp);

		write3X4(CRTLineCompare, 0xFF);
		write3X4(CRTPRowScan, 0);
		write3X4(CRTModeControl, 0xC3);

		write3X4(LinearAddReg,0x20); //enable linear addressing
		write3X4(LinearAddReg, 0x20); /* enable linear addressing */

		tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
		write3X4(CRTCModuleTest,tmp); //enable access extended memory
		write3X4(CRTCModuleTest, tmp); /* enable access extended memory */

		write3X4(GraphEngReg, 0x80); //enable GE for text acceleration
		write3X4(GraphEngReg, 0x80); /* enable GE for text acceleration */

		#ifdef CONFIG_FB_TRIDENT_ACCEL
		acc->init_accel(info->var.xres, bpp);
		#endif

		switch (bpp) {
		case 8: tmp = 0x00; break;
		case 16: tmp = 0x05; break;
		case 24: tmp = 0x29; break;
		case 32: tmp = 0x09;
		case 8:
		tmp = 0x00;
		break;
		case 16:
		tmp = 0x05;
		break;
		case 24:
		tmp = 0x29;
		break;
		case 32:
		tmp = 0x09;
		break;
		}

		write3X4(PixelBusReg, tmp);
		@@ -900,11 +991,11 @@ static int tridentfb_set_par(struct fb_info *info)
		tmp = 0x10;
		if (chipcyber)
		tmp \|= 0x20;
		write3X4(DRAMControl, tmp); //both IO,linear enable
		write3X4(DRAMControl, tmp); /* both IO, linear enable */

		write3X4(InterfaceSel, read3X4(InterfaceSel) \| 0x40);
		write3X4(Performance, 0x92);
		write3X4(PCIReg,0x07); //MMIO & PCI read and write burst enable
		write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */

		/* convert from picoseconds to MHz */
		par->vclk = 1000000 / info->var.pixclock;
		@@ -913,38 +1004,46 @@ static int tridentfb_set_par(struct fb_info *info)
		set_vclk(par->vclk);

		write3C4(0, 3);
		write3C4(1,1); //set char clock 8 dots wide
		write3C4(2,0x0F); //enable 4 maps because needed in chain4 mode
		write3C4(1, 1); /* set char clock 8 dots wide */
		write3C4(2, 0x0F); /* enable 4 maps because needed in chain4 mode */
		write3C4(3, 0);
		write3C4(4,0x0E); //memory mode enable bitmaps ??
		write3C4(4, 0x0E); /* memory mode enable bitmaps ?? */

		write3CE(MiscExtFunc,(bpp==32)?0x1A:0x12); //divide clock by 2 if 32bpp
		//chain4 mode display and CPU path
		write3CE(0x5,0x40); //no CGA compat,allow 256 col
		write3CE(0x6,0x05); //graphics mode
		write3CE(0x7,0x0F); //planes?
		write3CE(MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); /* divide clock by 2 if 32bpp */
		/* chain4 mode display and CPU path */
		write3CE(0x5, 0x40); /* no CGA compat, allow 256 col */
		write3CE(0x6, 0x05); /* graphics mode */
		write3CE(0x7, 0x0F); /* planes? */

		if (chip_id == CYBERBLADEXPAi1) {
		/* This fixes snow-effect in 32 bpp */
		write3X4(CRTHSyncStart, 0x84);
		}

		writeAttr(0x10,0x41); //graphics mode and support 256 color modes
		writeAttr(0x12,0x0F); //planes
		writeAttr(0x13,0); //horizontal pel panning
		writeAttr(0x10, 0x41); /* graphics mode and support 256 color modes */
		writeAttr(0x12, 0x0F); /* planes */
		writeAttr(0x13, 0); /* horizontal pel panning */

		//colors
		/* colors */
		for (tmp = 0; tmp < 0x10; tmp++)
		writeAttr(tmp, tmp);
		readb(par->io_virt + CRT + 0x0A); //flip-flop to index
		t_outb(0x20, 0x3C0); //enable attr
		readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
		t_outb(0x20, 0x3C0); /* enable attr */

		switch (bpp) {
		case 8: tmp = 0;break; //256 colors
		case 15: tmp = 0x10;break;
		case 16: tmp = 0x30;break; //hicolor
		case 24: //truecolor
		case 32: tmp = 0xD0;break;
		case 8:
		tmp = 0;
		break;
		case 15:
		tmp = 0x10;
		break;
		case 16:
		tmp = 0x30;
		break;
		case 24:
		case 32:
		tmp = 0xD0;
		break;
		}

		t_inb(0x3C8);
		@@ -975,7 +1074,6 @@ static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
		if (regno >= info->cmap.len)
		return 1;


		if (bpp == 8) {
		t_outb(0xFF, 0x3C6);
		t_outb(regno, 0x3C8);
		@@ -1000,7 +1098,7 @@ static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
		((blue & 0xFF00) >> 8);
		}

		// debug("exit\n");
		/* debug("exit\n"); */
		return 0;
		}

		@@ -1015,8 +1113,7 @@ static int tridentfb_blank(int blank_mode, struct fb_info *info)
		t_outb(0x04, 0x83C8); /* Read DPMS Control */
		PMCont = t_inb(0x83C6) & 0xFC;
		DPMSCont = read3CE(PowerStatus) & 0xFC;
		switch (blank_mode)
		{
		switch (blank_mode) {
		case FB_BLANK_UNBLANK:
		/* Screen: On, HSync: On, VSync: On */
		case FB_BLANK_NORMAL:
		@@ -1051,7 +1148,20 @@ static int tridentfb_blank(int blank_mode, struct fb_info *info)
		return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
		}

		static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_device_id * id)
		static struct fb_ops tridentfb_ops = {
		.owner = THIS_MODULE,
		.fb_setcolreg = tridentfb_setcolreg,
		.fb_pan_display = tridentfb_pan_display,
		.fb_blank = tridentfb_blank,
		.fb_check_var = tridentfb_check_var,
		.fb_set_par = tridentfb_set_par,
		.fb_fillrect = tridentfb_fillrect,
		.fb_copyarea = tridentfb_copyarea,
		.fb_imageblit = cfb_imageblit,
		};

		static int __devinit trident_pci_probe(struct pci_dev * dev,
		const struct pci_device_id * id)
		{
		int err;
		unsigned char revision;
		@@ -1075,18 +1185,29 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de

		switch (revision) {
		case 0x22:
		case 0x23: chip_id = CYBER9397;break;
		case 0x2A: chip_id = CYBER9397DVD;break;
		case 0x23:
		chip_id = CYBER9397;
		break;
		case 0x2A:
		chip_id = CYBER9397DVD;
		break;
		case 0x30:
		case 0x33:
		case 0x34:
		case 0x35:
		case 0x38:
		case 0x3A:
		case 0xB3: chip_id = CYBER9385;break;
		case 0x40 ... 0x43: chip_id = CYBER9382;break;
		case 0x4A: chip_id = CYBER9388;break;
		default:break;
		case 0xB3:
		chip_id = CYBER9385;
		break;
		case 0x40 ... 0x43:
		chip_id = CYBER9382;
		break;
		case 0x4A:
		chip_id = CYBER9388;
		break;
		default:
		break;
		}
		}

		@@ -1095,8 +1216,7 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de

		if (is_xp(chip_id)) {
		acc = &accel_xp;
		} else
		if (is_blade(chip_id)) {
		} else if (is_blade(chip_id)) {
		acc = &accel_blade;
		} else {
		acc = &accel_image;
		@@ -1252,7 +1372,8 @@ static int tridentfb_setup(char *options)
		if (!options \|\| !*options)
		return 0;
		while ((opt = strsep(&options, ",")) != NULL) {
		if (!*opt) continue;
		if (!*opt)
		continue;
		if (!strncmp(opt, "noaccel", 7))
		noaccel = 1;
		else if (!strncmp(opt, "fp", 2))
		@@ -1296,18 +1417,6 @@ static void __exit tridentfb_exit(void)
		pci_unregister_driver(&tridentfb_pci_driver);
		}

		static struct fb_ops tridentfb_ops = {
		.owner = THIS_MODULE,
		.fb_setcolreg = tridentfb_setcolreg,
		.fb_pan_display = tridentfb_pan_display,
		.fb_blank = tridentfb_blank,
		.fb_check_var = tridentfb_check_var,
		.fb_set_par = tridentfb_set_par,
		.fb_fillrect = tridentfb_fillrect,
		.fb_copyarea= tridentfb_copyarea,
		.fb_imageblit = cfb_imageblit,
		};

		module_init(tridentfb_init);
		module_exit(tridentfb_exit);