Loading arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,8 @@ #include "skeleton.dtsi" #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h> / { Loading Loading @@ -148,6 +150,12 @@ #clock-cells = <1>; }; clock_rpmh: qcom,rpmhclk { compatible = "qcom,dummycc"; clock-output-names = "rpmh_clocks"; #clock-cells = <1>; }; blsp1_uart2: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x831000 0x200>; Loading include/dt-bindings/clock/qcom,rpmh.h +2 −0 Original line number Diff line number Diff line Loading @@ -27,5 +27,7 @@ #define RPMH_RF_CLK2_A 9 #define RPMH_RF_CLK3 10 #define RPMH_RF_CLK3_A 11 #define RPMH_RF_CLK4 12 #define RPMH_RF_CLK4_A 13 #endif Loading
arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,8 @@ #include "skeleton.dtsi" #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h> / { Loading Loading @@ -148,6 +150,12 @@ #clock-cells = <1>; }; clock_rpmh: qcom,rpmhclk { compatible = "qcom,dummycc"; clock-output-names = "rpmh_clocks"; #clock-cells = <1>; }; blsp1_uart2: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x831000 0x200>; Loading
include/dt-bindings/clock/qcom,rpmh.h +2 −0 Original line number Diff line number Diff line Loading @@ -27,5 +27,7 @@ #define RPMH_RF_CLK2_A 9 #define RPMH_RF_CLK3 10 #define RPMH_RF_CLK3_A 11 #define RPMH_RF_CLK4 12 #define RPMH_RF_CLK4_A 13 #endif