Merge "clk: qcom: gcc-sdm845: Keep the gcc_sys_noc_cpuss_ahb_clk clock on" into msm-4.9 (23f66ded) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/clk/qcom/gcc-sdm845.c

+6 −3

Original line number	Diff line number	Diff line
		@@ -36,6 +36,7 @@

		#define GCC_APCS_CLOCK_SLEEP_ENA_VOTE_OFFSET 0x52008
		#define CPUSS_AHB_CLK_SLEEP_ENA BIT(21)
		#define SYS_NOC_CPUSS_AHB_CLK_SLEEP_ENA BIT(0)
		#define GCC_MMSS_MISC 0x09FFC
		#define GCC_GPU_MISC 0x71028

		@@ -3392,11 +3393,12 @@ static int gcc_sdm845_probe(struct platform_device *pdev)
		return PTR_ERR(regmap);

		/*
		* Set the CPUSS_AHB_CLK_SLEEP_ENA bit to allow the cpuss_ahb_clk to be
		* Set the _SLEEP_ENA bits to allow certain cpuss clocks to be
		* turned off by hardware during certain apps low power modes.
		*/
		regmap_update_bits(regmap, GCC_APCS_CLOCK_SLEEP_ENA_VOTE_OFFSET,
		CPUSS_AHB_CLK_SLEEP_ENA, CPUSS_AHB_CLK_SLEEP_ENA);
		CPUSS_AHB_CLK_SLEEP_ENA \| SYS_NOC_CPUSS_AHB_CLK_SLEEP_ENA,
		CPUSS_AHB_CLK_SLEEP_ENA \| SYS_NOC_CPUSS_AHB_CLK_SLEEP_ENA);

		vdd_cx.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_cx");
		if (IS_ERR(vdd_cx.regulator[0])) {
		@@ -3424,8 +3426,9 @@ static int gcc_sdm845_probe(struct platform_device *pdev)
		regmap_update_bits(regmap, GCC_MMSS_MISC, 0x3, 0x3);
		regmap_update_bits(regmap, GCC_GPU_MISC, 0x3, 0x3);

		/* Keep these HMSS clocks enabled always */
		/* Keep these CPUSS clocks enabled always */
		clk_prepare_enable(gcc_cpuss_ahb_clk.clkr.hw.clk);
		clk_prepare_enable(gcc_sys_noc_cpuss_ahb_clk.clkr.hw.clk);
		clk_prepare_enable(gcc_cpuss_dvm_bus_clk.clkr.hw.clk);
		clk_prepare_enable(gcc_cpuss_gnoc_clk.clkr.hw.clk);