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Commit 237dc913 authored by Mohit Aggarwal's avatar Mohit Aggarwal
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diag: Add AXI prefetch related padding for CI controller



The patch adds padding of 256 bytes as a workaround to
get rid of AXI prefetch related h/w issue while writing
data to USB. The padding is applicable only to chipidea
controller.

Change-Id: I51b56ec07ec8815e942324fa1bd7f167b6335b64
Signed-off-by: default avatarMohit Aggarwal <maggarwa@codeaurora.org>
parent ccf21f85
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+5 −1
Original line number Original line Diff line number Diff line
/* Copyright (c) 2008-2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2008-2018, The Linux Foundation. All rights reserved.
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * it under the terms of the GNU General Public License version 2 and
@@ -36,7 +36,11 @@


#define DIAG_MAX_REQ_SIZE	(16 * 1024)
#define DIAG_MAX_REQ_SIZE	(16 * 1024)
#define DIAG_MAX_RSP_SIZE	(16 * 1024)
#define DIAG_MAX_RSP_SIZE	(16 * 1024)
#ifdef CONFIG_USB_CI13XXX_MSM
#define APF_DIAG_PADDING	256
#else
#define APF_DIAG_PADDING	0
#define APF_DIAG_PADDING	0
#endif
/*
/*
 * In the worst case, the HDLC buffer can be atmost twice the size of the
 * In the worst case, the HDLC buffer can be atmost twice the size of the
 * original packet. Add 3 bytes for 16 bit CRC (2 bytes) and a delimiter
 * original packet. Add 3 bytes for 16 bit CRC (2 bytes) and a delimiter