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Commit 231957ae authored by Taniya Das's avatar Taniya Das
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clk: qcom: alpha-pll: Check for PLL run condition for Fabia PLL



The PLL could be enabled previously to HLOS and sourcing to the RCG. In
those cases where the clock driver receives the enable request it would
temporarily disable the PLL output. Thus handle such condition if PLL is
already enabled.

Change-Id: I75118c09ff67a35d866dabea4a948e7401915f9a
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 4a520b70
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+10 −2
Original line number Original line Diff line number Diff line
/*
/*
 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2015-2017, 2020, The Linux Foundation. All rights reserved.
 *
 *
 * This software is licensed under the terms of the GNU General Public
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * License version 2, as published by the Free Software Foundation, and
@@ -558,7 +558,7 @@ static int clk_fabia_pll_enable(struct clk_hw *hw)
{
{
	int ret;
	int ret;
	struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
	struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
	u32 val, off = pll->offset;
	u32 val, opmode_val, off = pll->offset;


	ret = regmap_read(pll->clkr.regmap, off + PLL_MODE, &val);
	ret = regmap_read(pll->clkr.regmap, off + PLL_MODE, &val);
	if (ret)
	if (ret)
@@ -572,6 +572,14 @@ static int clk_fabia_pll_enable(struct clk_hw *hw)
		return wait_for_pll_enable(pll, PLL_ACTIVE_FLAG);
		return wait_for_pll_enable(pll, PLL_ACTIVE_FLAG);
	}
	}


	ret = regmap_read(pll->clkr.regmap, off + FABIA_OPMODE, &opmode_val);
	if (ret)
		return ret;

	/* Skip If PLL is already running */
	if ((opmode_val & PLL_RUN) && (val & PLL_OUTCTRL))
		return 0;

	if (unlikely(!pll->inited))
	if (unlikely(!pll->inited))
		clk_fabia_pll_configure(pll, pll->clkr.regmap, pll->config);
		clk_fabia_pll_configure(pll, pll->clkr.regmap, pll->config);