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Commit 22fed4cf authored by Clarence Ip's avatar Clarence Ip
Browse files

msm: sde: disallow partial writes on rotator wb 



Configure the MDSS to only issue full writes on the rotator
writeback for non-UBWC formats. This is to prevent any
spurious reads from being generated by partial write attempts.

CRs-Fixed: 2048700
Change-Id: Ib39d9f9c070d2fb02fe6b69f9fbfcce4a7d7e160
Signed-off-by: default avatarClarence Ip <cip@codeaurora.org>
parent 56e33496

drivers/media/platform/msm/sde/rotator/sde_rotator_base.h

+2 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ enum sde_rot_type { 
 * @SDE_CAPS_R3_1P5_DOWNSCALE: 1.5x downscale rotator support

 * @SDE_CAPS_SBUF_1: stream buffer support for inline rotation

 * @SDE_CAPS_UBWC_2: universal bandwidth compression version 2

 * @SDE_CAPS_PARTIALWR: partial write override

 */

enum sde_caps_settings {

	SDE_CAPS_R1_WB,
@@ -106,6 +107,7 @@ enum sde_caps_settings { 
	SDE_CAPS_SEC_ATTACH_DETACH_SMMU,

	SDE_CAPS_SBUF_1,

	SDE_CAPS_UBWC_2,

	SDE_CAPS_PARTIALWR,

	SDE_CAPS_MAX,

};

drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c

+8 −1
Original line number Diff line number Diff line
@@ -1020,6 +1020,7 @@ static void sde_hw_rotator_setup_wbengine(struct sde_hw_rotator_context *ctx, 
	u32 *wrptr;

	u32 pack = 0;

	u32 dst_format = 0;

	u32 partial_write = 0;

	int i;



	wrptr = sde_hw_rotator_get_regdma_segment(ctx);
@@ -1103,8 +1104,13 @@ static void sde_hw_rotator_setup_wbengine(struct sde_hw_rotator_context *ctx, 
			cfg->v_downscale_factor |

			(cfg->h_downscale_factor << 16));



	/* partial write check */

	if (test_bit(SDE_CAPS_PARTIALWR, mdata->sde_caps_map) &&

			!sde_mdp_is_ubwc_format(fmt))

		partial_write = BIT(10);



	/* write config setup for bank configuration */

	SDE_REGDMA_WRITE(wrptr, ROT_WB_DST_WRITE_CONFIG,

	SDE_REGDMA_WRITE(wrptr, ROT_WB_DST_WRITE_CONFIG, partial_write |

			(ctx->rot->highest_bank & 0x3) << 8);



	if (test_bit(SDE_CAPS_UBWC_2, mdata->sde_caps_map))
@@ -2368,6 +2374,7 @@ static int sde_rotator_hw_rev_init(struct sde_hw_rotator *rot) 
		SDEROT_DBG("Supporting sys cache inline rotation\n");

		set_bit(SDE_CAPS_SBUF_1,  mdata->sde_caps_map);

		set_bit(SDE_CAPS_UBWC_2,  mdata->sde_caps_map);

		set_bit(SDE_CAPS_PARTIALWR,  mdata->sde_caps_map);

		rot->inpixfmts = sde_hw_rotator_v4_inpixfmts;

		rot->num_inpixfmt = ARRAY_SIZE(sde_hw_rotator_v4_inpixfmts);

		rot->outpixfmts = sde_hw_rotator_v4_outpixfmts;