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Commit 226ef5be authored by Amit Nischal's avatar Amit Nischal
Browse files

ARM: dts: msm: Add support for CPU clock for sdxpoorwills 



Add support for APCS clock controller by replacing dummy
cpu clock driver node with actual cpu clock driver node.

Change-Id: I11f97644d1eb9454f89bddaf49c602ede541c7f9
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent 86a69554

arch/arm/boot/dts/qcom/sdxpoorwills.dtsi

+18 −3
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/regulator/qcom,rpmh-regulator.h>



/ {

	model = "Qualcomm Technologies, Inc. SDX POORWILLS";
@@ -160,9 +161,23 @@ 
		#reset-cells = <1>;

	};



	clock_cpu: qcom,clock-a7@17810008 {

		compatible = "qcom,dummycc";

		clock-output-names = "cpu_clocks";

	clock_cpu: qcom,clock-a7@17808100 {

		compatible = "qcom,cpu-sdxpoorwills";

		clocks = <&clock_rpmh RPMH_CXO_CLK_A>;

		clock-names = "xo_ao";

		qcom,a7cc-init-rate = <1497600000>;

		reg = <0x17808100 0x7F10>;

		reg-names = "apcs_pll";

		qcom,rcg-reg-offset = <0x7F08>;



		vdd_dig_ao-supply = <&pmxpoorwills_s5_level_ao>;

		cpu-vdd-supply = <&pmxpoorwills_s5_level_ao>;

		qcom,speed0-bin-v0 =

			<          0 RPMH_REGULATOR_LEVEL_OFF>,

			<  345600000 RPMH_REGULATOR_LEVEL_LOW_SVS>,

			<  576000000 RPMH_REGULATOR_LEVEL_SVS>,

			< 1094400000 RPMH_REGULATOR_LEVEL_NOM>,

			< 1497600000 RPMH_REGULATOR_LEVEL_TURBO>;

		#clock-cells = <1>;

	};